<?xml version="1.0"?>
<feed xmlns="http://www.w3.org/2005/Atom" xml:lang="en">
	<id>http://andromeda.df.lu.lv/wiki/api.php?action=feedcontributions&amp;feedformat=atom&amp;user=Rinalds</id>
	<title>DiLab - User contributions [en]</title>
	<link rel="self" type="application/atom+xml" href="http://andromeda.df.lu.lv/wiki/api.php?action=feedcontributions&amp;feedformat=atom&amp;user=Rinalds"/>
	<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php/Special:Contributions/Rinalds"/>
	<updated>2026-04-15T19:05:14Z</updated>
	<subtitle>User contributions</subtitle>
	<generator>MediaWiki 1.31.0</generator>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6832</id>
		<title>LU-DIP-b</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6832"/>
		<updated>2016-12-16T06:34:53Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* Kalendārs */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 29.08.2016&lt;br /&gt;
- 02.09.2016&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 09.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 16.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 23.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 30.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 07.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.02.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 14.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.] &lt;br /&gt;
[http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.]&lt;br /&gt;
&amp;lt;!--| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.] --&amp;gt;&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 21.10.2016&lt;br /&gt;
| [https://drive.google.com/open?id=0B55VrJN-wdIgdXJLaFdFaWNPNWs Verilog (turpinājums). Galīgs Stāvokļu Automāts (FSM)]&lt;br /&gt;
[http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos veidojam VGA kontroleri [https://drive.google.com/open?id=0B55VrJN-wdIgak5QbmItSHBiTG8]&lt;br /&gt;
&lt;br /&gt;
|-&lt;br /&gt;
| 28.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 04.11.2016&lt;br /&gt;
| [https://dl.dropboxusercontent.com/u/9272970/CPU_LU.pdf Vientakts Procesors.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 11.11.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 18.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 25.11.2016&lt;br /&gt;
| [https://drive.google.com/open?id=0B55VrJN-wdIgQkZHVWNSN3JxZ00 Kopnes, saskarnes, to iedalījums.]&lt;br /&gt;
[https://drive.google.com/open?id=0B55VrJN-wdIgYjhWQkxFbXNJbUE Integrálo mikroshému kopnes.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 02.12.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| 09.12.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| 16.12.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| 23.12.2016&lt;br /&gt;
- 01.01.2017&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2017, &lt;br /&gt;
xx.01.2017&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2017&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2017&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP3 | KP2]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{{DIP_saites}}&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6818</id>
		<title>LU-DIP-b</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6818"/>
		<updated>2016-12-07T07:40:42Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* Kalendārs */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 29.08.2016&lt;br /&gt;
- 02.09.2016&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 09.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 16.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 23.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 30.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 07.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.02.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 14.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.] &lt;br /&gt;
[http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.]&lt;br /&gt;
&amp;lt;!--| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.] --&amp;gt;&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 21.10.2016&lt;br /&gt;
| [https://drive.google.com/open?id=0B55VrJN-wdIgdXJLaFdFaWNPNWs Verilog (turpinājums). Galīgs Stāvokļu Automāts (FSM)]&lt;br /&gt;
[http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos veidojam VGA kontroleri [https://drive.google.com/open?id=0B55VrJN-wdIgak5QbmItSHBiTG8]&lt;br /&gt;
&lt;br /&gt;
|-&lt;br /&gt;
| 28.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 04.11.2016&lt;br /&gt;
| [https://dl.dropboxusercontent.com/u/9272970/CPU_LU.pdf Vientakts Procesors.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 11.11.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 18.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 25.11.2016&lt;br /&gt;
| [https://drive.google.com/open?id=0B55VrJN-wdIgQkZHVWNSN3JxZ00 Kopnes, saskarnes, to iedalījums.]&lt;br /&gt;
[https://drive.google.com/open?id=0B55VrJN-wdIgYjhWQkxFbXNJbUE Integrálo mikroshému kopnes.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 04.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| 11.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| 18.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2015&lt;br /&gt;
- 01.01.2016&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2015, &lt;br /&gt;
xx.01.2015&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP3 | KP2]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{{DIP_saites}}&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6786</id>
		<title>LU-DIP-b</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6786"/>
		<updated>2016-11-03T21:53:38Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* Kalendārs */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 29.08.2016&lt;br /&gt;
- 02.09.2016&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 09.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 16.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 23.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 30.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 07.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.02.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 14.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.] &lt;br /&gt;
[http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.]&lt;br /&gt;
&amp;lt;!--| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.] --&amp;gt;&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 21.10.2016&lt;br /&gt;
| [https://drive.google.com/open?id=0B55VrJN-wdIgdXJLaFdFaWNPNWs Verilog (turpinājums). Galīgs Stāvokļu Automāts (FSM)]&lt;br /&gt;
[http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos veidojam VGA kontroleri [https://drive.google.com/open?id=0B55VrJN-wdIgak5QbmItSHBiTG8]&lt;br /&gt;
&lt;br /&gt;
|-&lt;br /&gt;
| 28.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 04.11.2016&lt;br /&gt;
| [https://dl.dropboxusercontent.com/u/9272970/CPU_LU.pdf Vientakts Procesors.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 11.11.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 18.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 25.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L08-DLXProcessorAndInstructions.1.01.pdf DLX procesors un instrukcijas.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 04.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| 11.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| 18.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2015&lt;br /&gt;
- 01.01.2016&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2015, &lt;br /&gt;
xx.01.2015&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP3 | KP2]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{{DIP_saites}}&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6783</id>
		<title>LU-DIP-b</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6783"/>
		<updated>2016-11-01T20:09:48Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* Kalendārs */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 29.08.2016&lt;br /&gt;
- 02.09.2016&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 09.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 16.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 23.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 30.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 07.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.02.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 14.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.] &lt;br /&gt;
[http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.]&lt;br /&gt;
&amp;lt;!--| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.] --&amp;gt;&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 21.10.2016&lt;br /&gt;
| [https://drive.google.com/open?id=0B55VrJN-wdIgdXJLaFdFaWNPNWs Verilog (turpinājums). Galīgs Stāvokļu Automāts (FSM)]&lt;br /&gt;
[http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos veidojam VGA kontroleri [https://drive.google.com/open?id=0B55VrJN-wdIgak5QbmItSHBiTG8]&lt;br /&gt;
&lt;br /&gt;
|-&lt;br /&gt;
| 28.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 04.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 11.11.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 18.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 25.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L08-DLXProcessorAndInstructions.1.01.pdf DLX procesors un instrukcijas.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 04.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| 11.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| 18.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2015&lt;br /&gt;
- 01.01.2016&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2015, &lt;br /&gt;
xx.01.2015&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP3 | KP2]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{{DIP_saites}}&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6766</id>
		<title>LU-DIP-b</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6766"/>
		<updated>2016-10-20T20:15:11Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* Kalendārs */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 29.08.2016&lt;br /&gt;
- 02.09.2016&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 09.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 16.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 23.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 30.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 07.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.02.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 14.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.] &lt;br /&gt;
[http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.]&lt;br /&gt;
&amp;lt;!--| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.] --&amp;gt;&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 21.10.2016&lt;br /&gt;
| [https://drive.google.com/open?id=0B55VrJN-wdIgdXJLaFdFaWNPNWs Verilog (turpinājums). Galīgs Stāvokļu Automāts (FSM)]&lt;br /&gt;
[http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos veidojam VGA kontroleri [https://drive.google.com/open?id=0B55VrJN-wdIgak5QbmItSHBiTG8]&lt;br /&gt;
&lt;br /&gt;
|-&lt;br /&gt;
| 28.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L08-DLXProcessorAndInstructions.1.01.pdf DLX procesors un instrukcijas.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 04.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 11.11.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 18.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 25.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 04.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| 11.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| 18.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2015&lt;br /&gt;
- 01.01.2016&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2015, &lt;br /&gt;
xx.01.2015&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP3 | KP2]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{{DIP_saites}}&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6765</id>
		<title>LU-DIP-b</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6765"/>
		<updated>2016-10-20T19:13:41Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* Kalendārs */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 29.08.2016&lt;br /&gt;
- 02.09.2016&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 09.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 16.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 23.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 30.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 07.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.02.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 14.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.] &lt;br /&gt;
[http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.]&lt;br /&gt;
&amp;lt;!--| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.] --&amp;gt;&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 21.10.2016&lt;br /&gt;
| [https://drive.google.com/open?id=0B55VrJN-wdIgdXJLaFdFaWNPNWs Verilog (turpinājums). Galīgs Stāvokļu Automāts (FSM)]&lt;br /&gt;
[http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
&lt;br /&gt;
|-&lt;br /&gt;
| 28.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L08-DLXProcessorAndInstructions.1.01.pdf DLX procesors un instrukcijas.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 04.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 11.11.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 18.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 25.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 04.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| 11.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| 18.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2015&lt;br /&gt;
- 01.01.2016&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2015, &lt;br /&gt;
xx.01.2015&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP3 | KP2]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{{DIP_saites}}&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6764</id>
		<title>LU-DIP-b</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6764"/>
		<updated>2016-10-20T19:12:21Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* Kalendārs */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 29.08.2016&lt;br /&gt;
- 02.09.2016&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 09.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 16.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 23.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 30.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 07.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.02.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 14.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.] &lt;br /&gt;
[http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.]&lt;br /&gt;
&amp;lt;!--| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.] --&amp;gt;&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 21.10.2016&lt;br /&gt;
| [https://drive.google.com/open?id=0B55VrJN-wdIgdXJLaFdFaWNPNWs Verilog (turpinājums). Galīgs Stāvokļu Automāts (FSM)]&lt;br /&gt;
[http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 28.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L08-DLXProcessorAndInstructions.1.01.pdf DLX procesors un instrukcijas.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 04.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 11.11.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 18.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 25.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 04.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| 11.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| 18.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2015&lt;br /&gt;
- 01.01.2016&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2015, &lt;br /&gt;
xx.01.2015&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP3 | KP2]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{{DIP_saites}}&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6763</id>
		<title>LU-DIP-b</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6763"/>
		<updated>2016-10-20T19:09:48Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* Kalendārs */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 29.08.2016&lt;br /&gt;
- 02.09.2016&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 09.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 16.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 23.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 30.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 07.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.02.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 14.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.] [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.]&lt;br /&gt;
&amp;lt;!--| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.] --&amp;gt;&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 21.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 28.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L08-DLXProcessorAndInstructions.1.01.pdf DLX procesors un instrukcijas.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 04.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 11.11.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 18.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 25.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 04.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| 11.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| 18.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2015&lt;br /&gt;
- 01.01.2016&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2015, &lt;br /&gt;
xx.01.2015&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP3 | KP2]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{{DIP_saites}}&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6762</id>
		<title>LU-DIP-b</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6762"/>
		<updated>2016-10-20T19:09:14Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 29.08.2016&lt;br /&gt;
- 02.09.2016&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 09.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 16.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 23.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 30.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 07.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.02.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 14.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
&amp;lt;!--| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.] --&amp;gt;&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 21.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 28.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L08-DLXProcessorAndInstructions.1.01.pdf DLX procesors un instrukcijas.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 04.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 11.11.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 18.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 25.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 04.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| 11.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| 18.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2015&lt;br /&gt;
- 01.01.2016&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2015, &lt;br /&gt;
xx.01.2015&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP3 | KP2]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{{DIP_saites}}&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6761</id>
		<title>LU-DIP-b</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6761"/>
		<updated>2016-10-20T19:07:47Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* Kalendārs */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 29.08.2016&lt;br /&gt;
- 02.09.2016&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 09.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 16.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 23.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 30.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 07.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.02.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 14.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.&lt;br /&gt;
  http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.                                                                                          ]&lt;br /&gt;
&amp;lt;!--| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.] --&amp;gt;&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 21.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 28.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L08-DLXProcessorAndInstructions.1.01.pdf DLX procesors un instrukcijas.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 04.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 11.11.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 18.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 25.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 04.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| 11.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| 18.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2015&lt;br /&gt;
- 01.01.2016&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2015, &lt;br /&gt;
xx.01.2015&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP3 | KP2]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{{DIP_saites}}&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6760</id>
		<title>LU-DIP-b</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6760"/>
		<updated>2016-10-20T16:12:55Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* Kalendārs */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 29.08.2016&lt;br /&gt;
- 02.09.2016&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 09.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 16.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 23.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 30.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 07.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.02.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 14.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
&amp;lt;!--| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.] --&amp;gt;&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 21.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 28.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L08-DLXProcessorAndInstructions.1.01.pdf DLX procesors un instrukcijas.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 04.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 11.11.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 18.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 25.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 04.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| 11.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| 18.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2015&lt;br /&gt;
- 01.01.2016&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2015, &lt;br /&gt;
xx.01.2015&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP3 | KP2]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{{DIP_saites}}&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6759</id>
		<title>LU-DIP-b</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6759"/>
		<updated>2016-10-20T16:11:24Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* Kalendārs */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 29.08.2016&lt;br /&gt;
- 02.09.2016&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 09.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 16.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 23.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 30.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 07.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.02.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 14.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 21.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 28.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L08-DLXProcessorAndInstructions.1.01.pdf DLX procesors un instrukcijas.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 04.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 11.11.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 18.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 25.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 04.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| 11.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| 18.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2015&lt;br /&gt;
- 01.01.2016&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2015, &lt;br /&gt;
xx.01.2015&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP3 | KP2]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{{DIP_saites}}&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:KP1&amp;diff=6756</id>
		<title>DIPb10:KP1</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:KP1&amp;diff=6756"/>
		<updated>2016-10-19T19:34:36Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* Vientakts procesora elementu projektēšana */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;=== Vientakts procesora elementu projektēšana ===&lt;br /&gt;
* Kursa projektu studenti veic individuāli.&lt;br /&gt;
* Kursa projekta izpilde var tikt veikta gan praktisko darbu laikā, izmantojot LU datorresursus, gan citā laikā, izmantojot citus studentiem pieejamos datorresursus.&lt;br /&gt;
* Lai nokārtotu ieskaiti, ir jābūt izpildītiem sekojošiem nosacījumiem:&lt;br /&gt;
** līdz kārtējās lekcijas sākumam uz e-pasta adresi rinalds punkts ruskuls pie gmail punkts com ir iesūtīts saarhivēts ISE projekts;&lt;br /&gt;
** kārtējo praktisko darbu laikā ir atrādīts ISE projekts, kurā ar testpiemēriem tiek prezentēta izveidotā funkcionalitāte;&lt;br /&gt;
&lt;br /&gt;
=== 1.posms ===&lt;br /&gt;
* Aritmētiski loģiskais bloks (ALU) - [http://books.google.lv/books?id=1lD9LZRcIZ8C 5.4, B.5, B.6]&lt;br /&gt;
** ieejas signāli A(31:0), B(31:0), OPCODE(3:0)&lt;br /&gt;
** izejas signāli RESULT(31:0), ZERO, OVERFLOW, CarryOut&lt;br /&gt;
** operācijas AND(0000), OR(0001), ADD(0010), SUB(0110), SLT(0111), NOR(1100)&lt;br /&gt;
* Iesūtīšanas termiņš 11.11.20126 08:30&lt;br /&gt;
* Atrādīšanas termiņš 11.11.2016 11:25&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6755</id>
		<title>LU-DIP-b</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6755"/>
		<updated>2016-10-19T19:32:36Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* Kursa projekti (KP) */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 29.08.2016&lt;br /&gt;
- 02.09.2016&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 09.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 16.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 23.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 30.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 07.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.02.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 14.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 21.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 28.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L08-DLXProcessorAndInstructions.1.01.pdf DLX procesors un instrukcijas.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 04.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 11.11.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 18.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 25.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 04.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| 11.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| 18.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2015&lt;br /&gt;
- 01.01.2016&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2015, &lt;br /&gt;
xx.01.2015&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP3 | KP2]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{{DIP_saites}}&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6754</id>
		<title>LU-DIP-b</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6754"/>
		<updated>2016-10-19T19:31:47Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 29.08.2016&lt;br /&gt;
- 02.09.2016&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 09.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 16.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 23.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 30.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 07.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.02.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 14.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 21.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 28.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L08-DLXProcessorAndInstructions.1.01.pdf DLX procesors un instrukcijas.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 04.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 11.11.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 18.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 25.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 04.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| 11.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| 18.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2015&lt;br /&gt;
- 01.01.2016&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2015, &lt;br /&gt;
xx.01.2015&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
* [[DIPb10:KP3 | KP2]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{{DIP_saites}}&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:KP3&amp;diff=6753</id>
		<title>DIPb10:KP3</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:KP3&amp;diff=6753"/>
		<updated>2016-10-19T19:29:38Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* Ieteicamā literatūra */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;=== Vidējas sarežģītības pabeigtas digitālas iekārtas projektēšana ===&lt;br /&gt;
* Kursa projekta tematiku studenti izvēlas paši, pasniedzējs, akceptē grupas izvēlēto projektu, kritēriji:&lt;br /&gt;
** lai kursa darbs nav par vienkāršu;&lt;br /&gt;
** lai kursa darbs nav par sarežģītu;&lt;br /&gt;
** kursadarba veicamo uzdevumu izpilde ir sadalīti vienmērīgi starp visiem izpildītājiem.&lt;br /&gt;
* Ja nav ideju kursa darba tematikai, pasniedzējs var ieteikt;&lt;br /&gt;
* Kursa projektu studenti veic grupā (1 grupa = 2 - 5 studenti).&lt;br /&gt;
* Individuāls darbs pie kursa projekta nav paredzēts.&lt;br /&gt;
* Kursa projekta izpilde var tikt veikta gan praktisko darbu laikā, izmantojot LU datorresursus, gan citā laikā, izmantojot citus studentiem pieejamos datorresursus.&lt;br /&gt;
* Kursa projekta laikā veicamo darbu sadalījumu grupas ietvaros studenti organizē paši pēc brīvprātības principa.&lt;br /&gt;
* Lai nokārtotu ieskaiti par kursa projektu, ir jābūt izpildītiem sekojošiem nosacījumiem:&lt;br /&gt;
** ir atrādīts ISE projekts, kurš ir lejupielādēts uz Xilinx Spartan 3E platformas un darbojas atbilstoši dotajai specifikācijai;&lt;br /&gt;
** ir jābūt skaidram, kāds ir katra studenta ieguldījums paveiktajā;&lt;br /&gt;
** ir jābūt skaidram, ka katram studentam ir izpratne gan par savu, gan par kolēģu paveikto.&lt;br /&gt;
&lt;br /&gt;
==== Kursa darba termiņi ====&lt;br /&gt;
&lt;br /&gt;
* Kursa darba termiņš ir sesijas laikā, kad ir izvēlēta eksāmena diena&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:KP3&amp;diff=6752</id>
		<title>DIPb10:KP3</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:KP3&amp;diff=6752"/>
		<updated>2016-10-19T19:29:29Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* Sarežģītākas pabeigtas digitālas iekārtas &amp;#039;&amp;#039;Heart rate monitor&amp;#039;&amp;#039; projektēšana */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;=== Vidējas sarežģītības pabeigtas digitālas iekārtas projektēšana ===&lt;br /&gt;
* Kursa projekta tematiku studenti izvēlas paši, pasniedzējs, akceptē grupas izvēlēto projektu, kritēriji:&lt;br /&gt;
** lai kursa darbs nav par vienkāršu;&lt;br /&gt;
** lai kursa darbs nav par sarežģītu;&lt;br /&gt;
** kursadarba veicamo uzdevumu izpilde ir sadalīti vienmērīgi starp visiem izpildītājiem.&lt;br /&gt;
* Ja nav ideju kursa darba tematikai, pasniedzējs var ieteikt;&lt;br /&gt;
* Kursa projektu studenti veic grupā (1 grupa = 2 - 5 studenti).&lt;br /&gt;
* Individuāls darbs pie kursa projekta nav paredzēts.&lt;br /&gt;
* Kursa projekta izpilde var tikt veikta gan praktisko darbu laikā, izmantojot LU datorresursus, gan citā laikā, izmantojot citus studentiem pieejamos datorresursus.&lt;br /&gt;
* Kursa projekta laikā veicamo darbu sadalījumu grupas ietvaros studenti organizē paši pēc brīvprātības principa.&lt;br /&gt;
* Lai nokārtotu ieskaiti par kursa projektu, ir jābūt izpildītiem sekojošiem nosacījumiem:&lt;br /&gt;
** ir atrādīts ISE projekts, kurš ir lejupielādēts uz Xilinx Spartan 3E platformas un darbojas atbilstoši dotajai specifikācijai;&lt;br /&gt;
** ir jābūt skaidram, kāds ir katra studenta ieguldījums paveiktajā;&lt;br /&gt;
** ir jābūt skaidram, ka katram studentam ir izpratne gan par savu, gan par kolēģu paveikto.&lt;br /&gt;
&lt;br /&gt;
==== Kursa darba termiņi ====&lt;br /&gt;
&lt;br /&gt;
* Kursa darba termiņš ir sesijas laikā, kad ir izvēlēta eksāmena diena&lt;br /&gt;
&lt;br /&gt;
=== Ieteicamā literatūra ===&lt;br /&gt;
* [http://books.google.lv/books?id=jFjJFC_ZqDsC&amp;amp;dq Biomedical information technology]&lt;br /&gt;
* [http://preview.web-ee.com/schematics/medical/heartbeat-monitor/ Heartbeat Monitor] by Keith Wilson&lt;br /&gt;
* [http://www.circuitcellar.com/microchip2007/winners/DE/MT2278.html Pulse Oximeter] by Gregory Ciavattone&lt;br /&gt;
* [http://embedded-lab.com/blog/?p=1671 Heart rate measurement from fingertip] by R-B @ Embedded Lab&lt;br /&gt;
* [http://www.radiolocman.com/shem/schematics.html?di=47010 DIY Heart Monitoring Device (Simple ECG)] by Refik Hadzialic&lt;br /&gt;
* [http://jupiter.cs.fmf.lu.lv/kursi/dip/Heart%20rate%20monitor/radio_1990_06.pdf Измерение частоты сигналов с большим периодом I] by В. Чекин&lt;br /&gt;
* [http://jupiter.cs.fmf.lu.lv/kursi/dip/Heart%20rate%20monitor/radio_1994_05.pdf Измерение частоты сигналов с большим периодом II] by И. Кострюков&lt;br /&gt;
* [http://translate.google.lv/translate?hl=lv&amp;amp;sl=ru&amp;amp;tl=en&amp;amp;u=http%3A%2F%2Fwww.irls.narod.ru%2Fizm%2Ffrm%2Fizmfr1.htm Measuring the frequency of signals with a large period II] by И. Кострюков translated by [http://translate.google.lv Google Translate]&lt;br /&gt;
* [http://jupiter.cs.fmf.lu.lv/kursi/dip/Heart%20rate%20monitor/radio_1994_04.pdf Измеритель частоты сердечных сокращений] by А. Сейнов&lt;br /&gt;
* [http://jupiter.cs.fmf.lu.lv/kursi/dip/Heart%20rate%20monitor/radio_1994_08.pdf Малогабаритный биопульсомер] by В. Ефремов&lt;br /&gt;
* [http://www.fpga4fun.com/TextLCDmodule.html Text LCD module] by Jean P. Nicolle&lt;br /&gt;
* [http://www.argus.lv/pub/datasheets/BPT20A.pdf Piezo buzzer BPT-20A]&lt;br /&gt;
* [http://www.pixelproc.net/msp430solarvario.html A Solar Audio Vario (piezo buzzer driving example)] by Hari Nair&lt;br /&gt;
* [http://www.xilinx.com/products/boards/s3estarter/files/s3esk_frequency_generator.zip PicoBlaze Processor Frequency Generator] by Ken Chapman&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6751</id>
		<title>LU-DIP-b</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6751"/>
		<updated>2016-10-19T19:28:47Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* Kalendārs */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 29.08.2016&lt;br /&gt;
- 02.09.2016&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 09.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 16.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 23.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 30.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 07.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.02.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 14.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 21.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 28.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L08-DLXProcessorAndInstructions.1.01.pdf DLX procesors un instrukcijas.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 04.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 11.11.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 18.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 25.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 04.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| 11.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| 18.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP2]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2015&lt;br /&gt;
- 01.01.2016&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2015, &lt;br /&gt;
xx.01.2015&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
* [[DIPb10:KP3 | KP3]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{{DIP_saites}}&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:KP2&amp;diff=6750</id>
		<title>DIPb10:KP2</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:KP2&amp;diff=6750"/>
		<updated>2016-10-19T19:27:50Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* Vidējas sarežģītības pabeigtas digitālas iekārtas projektēšana */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;=== Vidējas sarežģītības pabeigtas digitālas iekārtas projektēšana ===&lt;br /&gt;
* Kursa projekta tematiku studenti izvēlas paši, pasniedzējs, akceptē grupas izvēlēto projektu, kritēriji:&lt;br /&gt;
** lai kursa darbs nav par vienkāršu;&lt;br /&gt;
** lai kursa darbs nav par sarežģītu;&lt;br /&gt;
** kursadarba veicamo uzdevumu izpilde ir sadalīti vienmērīgi starp visiem izpildītājiem.&lt;br /&gt;
* Ja nav ideju kursa darba tematikai, pasniedzējs var ieteikt;&lt;br /&gt;
* Kursa projektu studenti veic grupā (1 grupa = 2 - 5 studenti).&lt;br /&gt;
* Individuāls darbs pie kursa projekta nav paredzēts.&lt;br /&gt;
* Kursa projekta izpilde var tikt veikta gan praktisko darbu laikā, izmantojot LU datorresursus, gan citā laikā, izmantojot citus studentiem pieejamos datorresursus.&lt;br /&gt;
* Kursa projekta laikā veicamo darbu sadalījumu grupas ietvaros studenti organizē paši pēc brīvprātības principa.&lt;br /&gt;
* Lai nokārtotu ieskaiti par kursa projektu, ir jābūt izpildītiem sekojošiem nosacījumiem:&lt;br /&gt;
** ir atrādīts ISE projekts, kurš ir lejupielādēts uz Xilinx Spartan 3E platformas un darbojas atbilstoši dotajai specifikācijai;&lt;br /&gt;
** ir jābūt skaidram, kāds ir katra studenta ieguldījums paveiktajā;&lt;br /&gt;
** ir jābūt skaidram, ka katram studentam ir izpratne gan par savu, gan par kolēģu paveikto.&lt;br /&gt;
&lt;br /&gt;
==== Kursa darba termiņi ====&lt;br /&gt;
&lt;br /&gt;
* Kursa darba termiņš ir sesijas laikā, kad ir izvēlēta eksāmena diena&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:KP2&amp;diff=6749</id>
		<title>DIPb10:KP2</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:KP2&amp;diff=6749"/>
		<updated>2016-10-19T19:26:19Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* Vidējas sarežģītības pabeigtas digitālas iekārtas projektēšana */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;=== Vidējas sarežģītības pabeigtas digitālas iekārtas projektēšana ===&lt;br /&gt;
* Kursa projekta tematiku studenti izvēlas paši, pasniedzējs, akceptē grupas izvēlēto projektu, kritēriji:&lt;br /&gt;
** lai kursa darbs nav par vienkāršu;&lt;br /&gt;
** lai kursa darbs nav par sarežģītu;&lt;br /&gt;
** kursadarba veicamo uzdevumu izpilde ir sadalīti vienmērīgi starp visiem izpildītājiem.&lt;br /&gt;
* Ja nav ideju kursa darba tematikai, pasniedzējs var ieteikt;&lt;br /&gt;
* Kursa projektu studenti veic grupā (1 grupa = 2 - 5 studenti).&lt;br /&gt;
* Individuāls darbs pie kursa projekta nav paredzēts.&lt;br /&gt;
* Kursa projekta izpilde var tikt veikta gan praktisko darbu laikā, izmantojot LU datorresursus, gan citā laikā, izmantojot citus studentiem pieejamos datorresursus.&lt;br /&gt;
* Kursa projekta laikā veicamo darbu sadalījumu grupas ietvaros studenti organizē paši pēc brīvprātības principa.&lt;br /&gt;
* Lai nokārtotu ieskaiti par kursa projektu, ir jābūt izpildītiem sekojošiem nosacījumiem:&lt;br /&gt;
** ir atrādīts ISE projekts, kurš ir lejupielādēts uz Xilinx Spartan 3E platformas un darbojas atbilstoši dotajai specifikācijai;&lt;br /&gt;
** ir jābūt skaidram, kāds ir katra studenta ieguldījums paveiktajā;&lt;br /&gt;
** ir jābūt skaidram, ka katram studentam ir izpratne gan par savu, gan par kolēģu paveikto.&lt;br /&gt;
&lt;br /&gt;
----&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:KP2&amp;diff=6748</id>
		<title>DIPb10:KP2</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:KP2&amp;diff=6748"/>
		<updated>2016-10-19T19:24:42Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* Vidējas sarežģītības pabeigtas digitālas iekārtas projektēšana */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;=== Vidējas sarežģītības pabeigtas digitālas iekārtas projektēšana ===&lt;br /&gt;
* Kursa projekta tematiku studenti izvēlas paši, pasniedzējs, akceptē grupas izvēlēto projektu, kritēriji:&lt;br /&gt;
** lai kursa darbs nav par vienkāršu;&lt;br /&gt;
** lai kursa darbs nav par sarežģītu;&lt;br /&gt;
** kursadarba veicamo uzdevumu izpilde ir sadalīti vienmērīgi starp visiem izpildītājiem.&lt;br /&gt;
* Kursa projektu studenti veic grupā (1 grupa = 2 - 5 studenti).&lt;br /&gt;
* Individuāls darbs pie kursa projekta nav paredzēts.&lt;br /&gt;
* Kursa projekta izpilde var tikt veikta gan praktisko darbu laikā, izmantojot LU datorresursus, gan citā laikā, izmantojot citus studentiem pieejamos datorresursus.&lt;br /&gt;
* Kursa projekta laikā veicamo darbu sadalījumu grupas ietvaros studenti organizē paši pēc brīvprātības principa.&lt;br /&gt;
* Lai nokārtotu ieskaiti par kursa projektu, ir jābūt izpildītiem sekojošiem nosacījumiem:&lt;br /&gt;
** ir atrādīts ISE projekts, kurš ir lejupielādēts uz Xilinx Spartan 3E platformas un darbojas atbilstoši dotajai specifikācijai;&lt;br /&gt;
** ir jābūt skaidram, kāds ir katra studenta ieguldījums paveiktajā;&lt;br /&gt;
** ir jābūt skaidram, ka katram studentam ir izpratne gan par savu, gan par kolēģu paveikto.&lt;br /&gt;
&lt;br /&gt;
----&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:KP2&amp;diff=6747</id>
		<title>DIPb10:KP2</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:KP2&amp;diff=6747"/>
		<updated>2016-10-19T19:21:29Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* Vienkāršas pabeigtas digitālas iekārtas &amp;#039;&amp;#039;Running Lights&amp;#039;&amp;#039; projektēšana */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;=== Vidējas sarežģītības pabeigtas digitālas iekārtas projektēšana ===&lt;br /&gt;
* Kursa projektu studenti veic grupā (1 grupa = 2 - 5 studenti).&lt;br /&gt;
* Individuāls darbs pie kursa projekta nav paredzēts.&lt;br /&gt;
* Kursa projekta izpilde var tikt veikta gan praktisko darbu laikā, izmantojot LU datorresursus, gan citā laikā, izmantojot citus studentiem pieejamos datorresursus.&lt;br /&gt;
* Kursa projekta laikā veicamo darbu sadalījumu grupas ietvaros studenti organizē paši pēc brīvprātības principa.&lt;br /&gt;
* Lai nokārtotu ieskaiti par kursa projektu, ir jābūt izpildītiem sekojošiem nosacījumiem:&lt;br /&gt;
** ir atrādīts ISE projekts, kurš ir lejupielādēts uz Xilinx Spartan 3E platformas un darbojas atbilstoši dotajai specifikācijai;&lt;br /&gt;
** ir jābūt skaidram, kāds ir katra studenta ieguldījums paveiktajā;&lt;br /&gt;
** ir jābūt skaidram, ka katram studentam ir izpratne gan par savu, gan par kolēģu paveikto.&lt;br /&gt;
&lt;br /&gt;
----&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:KP1&amp;diff=6746</id>
		<title>DIPb10:KP1</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:KP1&amp;diff=6746"/>
		<updated>2016-10-18T15:17:40Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;=== Vientakts procesora elementu projektēšana ===&lt;br /&gt;
* Kursa projektu studenti veic individuāli.&lt;br /&gt;
* Kursa projekta izpilde var tikt veikta gan praktisko darbu laikā, izmantojot LU datorresursus, gan citā laikā, izmantojot citus studentiem pieejamos datorresursus.&lt;br /&gt;
* Kursa projekts ir sadalīts 2 secīgos posmos.&lt;br /&gt;
* Uzsākt nākošo posmu students var tikai tad, kad ir veiksmīgi nokārtojis ieskaiti par iepriekšējā posmā paveikto.&lt;br /&gt;
* Lai nokārtotu ieskaiti, ir jābūt izpildītiem sekojošiem nosacījumiem:&lt;br /&gt;
** līdz kārtējās lekcijas sākumam uz e-pasta adresi rinalds punkts ruskuls pie gmail punkts com ir iesūtīts saarhivēts ISE projekts;&lt;br /&gt;
** kārtējo praktisko darbu laikā ir atrādīts ISE projekts, kurā ar testpiemēriem tiek prezentēta izveidotā funkcionalitāte;&lt;br /&gt;
&lt;br /&gt;
=== 1.posms ===&lt;br /&gt;
* Aritmētiski loģiskais bloks (ALU) - [http://books.google.lv/books?id=1lD9LZRcIZ8C 5.4, B.5, B.6]&lt;br /&gt;
** ieejas signāli A(31:0), B(31:0), OPCODE(3:0)&lt;br /&gt;
** izejas signāli RESULT(31:0), ZERO, OVERFLOW, CarryOut&lt;br /&gt;
** operācijas AND(0000), OR(0001), ADD(0010), SUB(0110), SLT(0111), NOR(1100)&lt;br /&gt;
* Iesūtīšanas termiņš 11.11.20126 08:30&lt;br /&gt;
* Atrādīšanas termiņš 11.11.2016 11:25&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=Main_Page&amp;diff=6745</id>
		<title>Main Page</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=Main_Page&amp;diff=6745"/>
		<updated>2016-10-18T15:17:19Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* Kursi */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{Google1|1|&amp;#039;&amp;#039;&amp;#039;Sveiks DiLab-ā / Welcome to DILab Wiki&amp;#039;&amp;#039;&amp;#039;}}&lt;br /&gt;
{{TocRight}}&lt;br /&gt;
{| &lt;br /&gt;
| &lt;br /&gt;
Datoru inženierijas,&lt;br /&gt;
Iegulto sistēmu un sensoru laboratorija,&lt;br /&gt;
Datorikas Fakultāte, &lt;br /&gt;
Latvijas Universitāte.&lt;br /&gt;
Vada: [[User:Leo | Leo Seļāvo]]&lt;br /&gt;
&lt;br /&gt;
| ::  ::&lt;br /&gt;
|&lt;br /&gt;
Computer Engineering, Embedded Systems and Sensors Lab, &lt;br /&gt;
Faculty of Computing, &lt;br /&gt;
University of Latvia&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
= Kursi = &lt;br /&gt;
&lt;br /&gt;
* [[Leo:Kursi | &amp;#039;&amp;#039;&amp;#039;Mācību kursi&amp;#039;&amp;#039;&amp;#039;]] Latvijas Universitātē, Datorikas Fakultātes ietvaros&amp;#039;&amp;#039;&lt;br /&gt;
** 2016 rudens: [[LU-LSP-b | LSP-b]], [[LU-VIV-m | VIV-m]], [[LU-OSI-m | OSI-m]], [[LU-DIP-b | DIP-b]], Specsemināri: [[LU-KFS-s | KFS]], [[LU-MLI-s | MLI]]&lt;br /&gt;
&lt;br /&gt;
* [http://selavo.lv/df Datorikas Fakultāte] - neoficialā LU DF informācijas lapa (un oficiālais [http://www.df.lu.lv LU DF portāls])&lt;br /&gt;
&lt;br /&gt;
= Projekti =&lt;br /&gt;
&lt;br /&gt;
* [[MansOS]]&lt;br /&gt;
* LU DF [[Robotikas klubs]], un mūsu [[Roboti]], to izstrāde [http://www.eurobot.org/eng/ EuroBot], Robotikas un citām sacensībām&lt;br /&gt;
* [[GCDC]] - gatavošanās dalībai Grand Cooperative Driving Challenge&lt;br /&gt;
** [http://www.youtube.com/watch?v=se3FAM_yR2U&amp;amp;feature=player_embedded LU + EDI GCDC komandas video]&lt;br /&gt;
** [http://www.gcdc.net/mainmenu/Home/news/Reuters%27_Reportage_has_been_broadcasted_on... GCDC Reuters video]&lt;br /&gt;
** [http://www.edi.lv/en/home/events/gcdc/ GCDC-2011 EDI ziņās]&lt;br /&gt;
&lt;br /&gt;
* Senāki projekti&lt;br /&gt;
** [[SAD]] - Sensori Augļu Dārzā.&lt;br /&gt;
** [[LynxNet]] - Sensori lūšu dzīves novērošanai&lt;br /&gt;
** VIVE - Virtuālā vide (ViV kursa projekts)&lt;br /&gt;
** [[AutoPilsēta]]&lt;br /&gt;
** [[Smart-Buildings | Viedās ēkas]] - kiberfizikālās sistēmas komfortam, produktivitātei un energoefektivitātei.&lt;br /&gt;
&lt;br /&gt;
= Cilvēki =&lt;br /&gt;
&lt;br /&gt;
Pētnieki&lt;br /&gt;
&lt;br /&gt;
* [[User:Leo | Leo Seļāvo]] &amp;#039;&amp;#039;(Dr.dat.zin.)&amp;#039;&amp;#039;&lt;br /&gt;
* Ivars Driķis &amp;#039;&amp;#039;(Dr.fiz.)&amp;#039;&amp;#039;&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
Mācību (palīg)spēki&lt;br /&gt;
&lt;br /&gt;
* Artis Mednis  &amp;#039;&amp;#039;(Dr.dat.zin.)&amp;#039;&amp;#039;&lt;br /&gt;
* Kaspars Sudars  &amp;#039;&amp;#039;(Dr.dat.zin.)&amp;#039;&amp;#039;&lt;br /&gt;
* Rinalds Ruskuls&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
Alumni (kas piedalījušies DiLab projektos)&lt;br /&gt;
&lt;br /&gt;
* Jānis Timma&lt;br /&gt;
* Rūdolfs Bundulis&lt;br /&gt;
* Georgijs Kanonirs&lt;br /&gt;
* Kārlis Priedītis&lt;br /&gt;
* [[User:Atis | Atis Elsts]]  &amp;#039;&amp;#039;(Dr.dat.zin.)&amp;#039;&amp;#039;&lt;br /&gt;
* [[User:Girts | Ģirts Strazdiņš]]  &amp;#039;&amp;#039;(Dr.dat.zin.)&amp;#039;&amp;#039;&lt;br /&gt;
&lt;br /&gt;
= Resursi =&lt;br /&gt;
&lt;br /&gt;
DiLab nodrošina vidi datoru inženierijas un robotikas projektiem, gan programmatūras, gan aparatūras izstrādei. &lt;br /&gt;
Mums ir pieejama klase ar datoriem kā arī datu serveri LU citi DF IT resursi. &lt;br /&gt;
DiLab iespējams veidot projektus, kas balstīti uz Arm mikrokontrolieru kā arī 8- un 16-bitu kontrolieru platformām, tai skaitā Arduino.&lt;br /&gt;
&lt;br /&gt;
Bez tam, DiLab telpās ir pieejami lodēšanas stacija parastajām un virsmas montāžas komponentēm, oscilogrāfs un signālu ģenerators, kā arī cita pēraparatūra.&lt;br /&gt;
&lt;br /&gt;
Ja jūs vēlaties atbalstīt DiLab, tad šeit pieejams saraksts ar [[DiLab:Whishlist | lietām, kas būtu noderīgas]] DiLab laboratorijai.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
= Saites =&lt;br /&gt;
&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;[[Jaunumi]] ārpus DiLab&amp;#039;&amp;#039;&amp;#039;, jaunākie sasniegumi datorinženierijā un robotikā&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
* [http://www.lu.lv/studentiem/studijas/kalendars/akademiskais/ LU akadēmiskais kalendārs]&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
----&lt;br /&gt;
* [[MediaWiki piezīmes]]&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:MD4&amp;diff=6744</id>
		<title>DIPb10:MD4</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:MD4&amp;diff=6744"/>
		<updated>2016-10-18T15:16:28Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;* Izveidot loģisko shēmu, kas nodrošina sekojošu funkcionalitāti:&lt;br /&gt;
** INPUTS – A, B (8 biti)&lt;br /&gt;
** OUTPUTS  - Q (8 biti), &amp;#039;&amp;#039;CarryOut&amp;#039;&amp;#039;, &amp;#039;&amp;#039;Overflow&amp;#039;&amp;#039;&lt;br /&gt;
** Q = A + B&lt;br /&gt;
** &amp;#039;&amp;#039;&amp;#039;darbojas ātrāk&amp;#039;&amp;#039;&amp;#039; nekā lekcijā apskatītais &amp;#039;&amp;#039;ripple&amp;#039;&amp;#039; &amp;#039;&amp;#039;carry&amp;#039;&amp;#039; risinājums&lt;br /&gt;
* Iesniegšanas termiņš 07.10.2016 08:30&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:MD3&amp;diff=6743</id>
		<title>DIPb10:MD3</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:MD3&amp;diff=6743"/>
		<updated>2016-10-18T15:15:47Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;* Izveidot loģisko shēmu, kas nodrošina [http://jupiter.cs.fmf.lu.lv/~kursi/dip/MD04.png gaismas diodes LED0] mirgošanu ar frekvenci tieši 0.5 Hz (1 sekundi nedeg, 1 sekundi deg, utt.)&lt;br /&gt;
* Iesniegšanas termiņš 30.09.2016 08:30&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:MD2&amp;diff=6742</id>
		<title>DIPb10:MD2</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:MD2&amp;diff=6742"/>
		<updated>2016-10-18T15:15:23Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;* Izmantojot FET tranzistorus, izveidot 4 atsevišķas loģiskās shēmas, kuras nodrošina sekojošu funkcionalitāti - AND, NAND, OR un NOR.&lt;br /&gt;
* Izmantojot tikai elementus NAND, NOR un NOT, izveidot elementu XOR (2 variantos): 1. vadi &amp;#039;&amp;#039;&amp;#039;drīkst&amp;#039;&amp;#039;&amp;#039; krustoties, 2. vadi &amp;#039;&amp;#039;&amp;#039;nedrīkst&amp;#039;&amp;#039;&amp;#039; krustoties&lt;br /&gt;
* Iesniegšanas termiņš 23.09.2016 8.30&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:MD1&amp;diff=6741</id>
		<title>DIPb10:MD1</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:MD1&amp;diff=6741"/>
		<updated>2016-10-18T15:14:49Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;* Izveidot loģisko tabulu, kas ataino dotās [http://jupiter.cs.fmf.lu.lv/~kursi/dip/MD01.gif loģiskās shēmas] darbību&lt;br /&gt;
* Izveidot loģisko tabulu un atbilstošu loģisko shēmu, kas darbojas kā [http://jupiter.cs.fmf.lu.lv/~kursi/dip/MD02.gif 7-segmentu indikatora] dekoderis (ieejā 3 biti, nepieciešams atainot skaitļus no 0 līdz 7) &lt;br /&gt;
* Iesniegšanas termiņš 16.09.2016 08:30&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:KP1&amp;diff=6735</id>
		<title>DIPb10:KP1</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:KP1&amp;diff=6735"/>
		<updated>2016-10-13T16:41:01Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* 1.posms */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;=== Vientakts procesora elementu projektēšana ===&lt;br /&gt;
* Kursa projektu studenti veic individuāli.&lt;br /&gt;
* Kursa projekta izpilde var tikt veikta gan praktisko darbu laikā, izmantojot LU datorresursus, gan citā laikā, izmantojot citus studentiem pieejamos datorresursus.&lt;br /&gt;
* Kursa projekts ir sadalīts 2 secīgos posmos.&lt;br /&gt;
* Uzsākt nākošo posmu students var tikai tad, kad ir veiksmīgi nokārtojis ieskaiti par iepriekšējā posmā paveikto.&lt;br /&gt;
* Lai nokārtotu ieskaiti, ir jābūt izpildītiem sekojošiem nosacījumiem:&lt;br /&gt;
** līdz kārtējās lekcijas sākumam uz e-pasta adresi rinalds punkts ruskuls pie gmail punkts com ir iesūtīts saarhivēts ISE projekts;&lt;br /&gt;
** kārtējo praktisko darbu laikā ir atrādīts ISE projekts, kurā ar testpiemēriem tiek prezentēta izveidotā funkcionalitāte;&lt;br /&gt;
&lt;br /&gt;
=== 1.posms ===&lt;br /&gt;
* Aritmētiski loģiskais bloks (ALU) - [http://books.google.lv/books?id=1lD9LZRcIZ8C 5.4, B.5, B.6]&lt;br /&gt;
** ieejas signāli A(31:0), B(31:0), OPCODE(3:0)&lt;br /&gt;
** izejas signāli RESULT(31:0), ZERO, OVERFLOW, CarryOut&lt;br /&gt;
** operācijas AND(0000), OR(0001), ADD(0010), SUB(0110), SLT(0111), NOR(1100)&lt;br /&gt;
* Iesūtīšanas termiņš 11.11.20126 08:30&lt;br /&gt;
* Atrādīšanas termiņš 11.10.2016 11:25&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:KP1&amp;diff=6734</id>
		<title>DIPb10:KP1</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:KP1&amp;diff=6734"/>
		<updated>2016-10-13T16:39:31Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* 2.posms */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;=== Vientakts procesora elementu projektēšana ===&lt;br /&gt;
* Kursa projektu studenti veic individuāli.&lt;br /&gt;
* Kursa projekta izpilde var tikt veikta gan praktisko darbu laikā, izmantojot LU datorresursus, gan citā laikā, izmantojot citus studentiem pieejamos datorresursus.&lt;br /&gt;
* Kursa projekts ir sadalīts 2 secīgos posmos.&lt;br /&gt;
* Uzsākt nākošo posmu students var tikai tad, kad ir veiksmīgi nokārtojis ieskaiti par iepriekšējā posmā paveikto.&lt;br /&gt;
* Lai nokārtotu ieskaiti, ir jābūt izpildītiem sekojošiem nosacījumiem:&lt;br /&gt;
** līdz kārtējās lekcijas sākumam uz e-pasta adresi rinalds punkts ruskuls pie gmail punkts com ir iesūtīts saarhivēts ISE projekts;&lt;br /&gt;
** kārtējo praktisko darbu laikā ir atrādīts ISE projekts, kurā ar testpiemēriem tiek prezentēta izveidotā funkcionalitāte;&lt;br /&gt;
&lt;br /&gt;
=== 1.posms ===&lt;br /&gt;
* Aritmētiski loģiskais bloks (ALU) - [http://books.google.lv/books?id=1lD9LZRcIZ8C 5.4, B.5, B.6]&lt;br /&gt;
** ieejas signāli A(31:0), B(31:0), OPCODE(3:0)&lt;br /&gt;
** izejas signāli RESULT(31:0), ZERO, OVERFLOW, CarryOut&lt;br /&gt;
** operācijas AND(0000), OR(0001), ADD(0010), SUB(0110), SLT(0111), NOR(1100)&lt;br /&gt;
* Iesūtīšanas termiņš 19.10.2012 08:30&lt;br /&gt;
* Atrādīšanas termiņš 19.10.2012 12:10&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6733</id>
		<title>LU-DIP-b</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6733"/>
		<updated>2016-10-13T16:38:58Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* Kalendārs */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 29.08.2016&lt;br /&gt;
- 02.09.2016&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 09.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 16.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 23.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 30.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 07.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.02.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 14.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 21.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 28.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L08-DLXProcessorAndInstructions.1.01.pdf DLX procesors un instrukcijas.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 04.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 11.11.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 18.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP3]]&lt;br /&gt;
|-&lt;br /&gt;
| 25.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
|-&lt;br /&gt;
| 04.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| 11.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| 18.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2015&lt;br /&gt;
- 01.01.2016&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2015, &lt;br /&gt;
xx.01.2015&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
* [[DIPb10:KP3 | KP3]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{{DIP_saites}}&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6696</id>
		<title>LU-DIP-b</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6696"/>
		<updated>2016-09-29T19:51:04Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* Kalendārs */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 29.08.2016&lt;br /&gt;
- 02.09.2016&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 09.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 16.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 23.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 30.09.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 07.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.02.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 14.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 21.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 28.10.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L08-DLXProcessorAndInstructions.1.01.pdf DLX procesors un instrukcijas.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 04.11.2016&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 13.11.2015&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 20.11.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP3]]&lt;br /&gt;
|-&lt;br /&gt;
| 27.11.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
|-&lt;br /&gt;
| 04.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| 11.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| 18.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2015&lt;br /&gt;
- 01.01.2016&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2015, &lt;br /&gt;
xx.01.2015&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
* [[DIPb10:KP3 | KP3]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{{DIP_saites}}&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6233</id>
		<title>LU-DIP-b</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b&amp;diff=6233"/>
		<updated>2015-09-11T05:19:26Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* Kalendārs */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 31.08.2015&lt;br /&gt;
- 05.09.2015&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 11.09.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 18.09.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 25.09.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 2.10.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 09.10.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.02.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 16.10.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 23.10.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 30.10.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L08-DLXProcessorAndInstructions.1.01.pdf DLX procesors un instrukcijas.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 06.11.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 13.11.2015&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 20.11.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP3]]&lt;br /&gt;
|-&lt;br /&gt;
| 27.11.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
|-&lt;br /&gt;
| 04.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| 11.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| 18.12.2015&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2015&lt;br /&gt;
- 01.01.2016&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2015, &lt;br /&gt;
xx.01.2015&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2016&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
* [[DIPb10:KP3 | KP3]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{{DIP_saites}}&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b14&amp;diff=5348</id>
		<title>LU-DIP-b14</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b14&amp;diff=5348"/>
		<updated>2014-09-04T15:55:04Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 01.09.2014&lt;br /&gt;
- 08.09.2014&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 05.09.2014&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 12.09.2014&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 19.09.2014&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 26.09.2014&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 03.10.2014&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.02.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 10.10.2014&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 17.10.2014&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 24.10.2014&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L08-DLXProcessorAndInstructions.1.01.pdf DLX procesors un instrukcijas.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 31.10.2014&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 07.11.2014&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 14.11.2014&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP3]]&lt;br /&gt;
|-&lt;br /&gt;
| 21.11.2014&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
|-&lt;br /&gt;
| 28.11.2014&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| 05.12.2014&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| 12.12.2014&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2014&lt;br /&gt;
- 01.01.2015&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2015, &lt;br /&gt;
xx.01.2015&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2015&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2015&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
* [[DIPb10:KP3 | KP3]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{{DIP_saites}}&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b14&amp;diff=5347</id>
		<title>LU-DIP-b14</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b14&amp;diff=5347"/>
		<updated>2014-09-04T15:50:28Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 02.09.2013 &lt;br /&gt;
- 09.09.2013&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 06.09.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 13.09.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 20.09.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 27.09.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 04.10.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.02.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 11.10.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 18.10.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 25.10.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L08-DLXProcessorAndInstructions.1.01.pdf DLX procesors un instrukcijas.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 01.11.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 08.11.2013&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 15.11.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP3]]&lt;br /&gt;
|-&lt;br /&gt;
| 22.11.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
|-&lt;br /&gt;
| 29.11.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| 06.12.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| 13.12.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2013 &lt;br /&gt;
- 01.01.2014&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2014, &lt;br /&gt;
xx.01.2014&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2014&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2014&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
* [[DIPb10:KP3 | KP3]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{{DIP_saites}}&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b14&amp;diff=5346</id>
		<title>LU-DIP-b14</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b14&amp;diff=5346"/>
		<updated>2014-09-04T15:49:11Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b14&amp;diff=5345</id>
		<title>LU-DIP-b14</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b14&amp;diff=5345"/>
		<updated>2014-09-04T15:48:06Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* &amp;#039;&amp;#039;&amp;#039;{{{1|Kursa nosaukums}}}&amp;#039;&amp;#039;&amp;#039; ({{{2|DiLabKods}}}) */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b14&amp;diff=5344</id>
		<title>LU-DIP-b14</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b14&amp;diff=5344"/>
		<updated>2014-09-04T15:47:49Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: New page: =&amp;#039;&amp;#039;&amp;#039;{{{1|Kursa nosaukums}}}&amp;#039;&amp;#039;&amp;#039; ({{{2|DiLabKods}}})=  [http://selavo.lv/df LU DF] {{{5|bakalaura}}} studiju kurss [https://luis.lu.lv/pls/pub/kursi.kurss_dati?l=1&amp;amp;p_kods={{{4|LuisKods}}} {{...&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;=&amp;#039;&amp;#039;&amp;#039;{{{1|Kursa nosaukums}}}&amp;#039;&amp;#039;&amp;#039; ({{{2|DiLabKods}}})=&lt;br /&gt;
&lt;br /&gt;
[http://selavo.lv/df LU DF] {{{5|bakalaura}}} studiju kurss [https://luis.lu.lv/pls/pub/kursi.kurss_dati?l=1&amp;amp;p_kods={{{4|LuisKods}}} {{{3|DZKods}}}],&lt;br /&gt;
[http://estudijas.lu.lv/course/search.php?search={{{3}}} meklēt eStudijās].&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- http://estudijas.lu.lv/course/view.php?id={{{6|0}}} eStudijas].--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
&amp;lt;noinclude&amp;gt;&lt;br /&gt;
== Templates lietojums ==&lt;br /&gt;
Parametri:&lt;br /&gt;
# Kursa nosaukums&lt;br /&gt;
# DiLab kods, piem. BST&lt;br /&gt;
# DatZxxxx kods, piem. DatZ3070&lt;br /&gt;
# LUIS apraksta kods, piem: 2DAT3253&lt;br /&gt;
# bakalaura vai maģistra un doktorantūras&lt;br /&gt;
# saite uz kursu eStudijās&lt;br /&gt;
&lt;br /&gt;
&amp;lt;/noinclude&amp;gt;&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=User:Leo&amp;diff=5343</id>
		<title>User:Leo</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=User:Leo&amp;diff=5343"/>
		<updated>2014-09-04T15:45:58Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* &amp;#039;&amp;#039;&amp;#039;Kursi&amp;#039;&amp;#039;&amp;#039; */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;__NOTOC__&lt;br /&gt;
{{LeoTwitter|LeoWiki}}&lt;br /&gt;
{| &lt;br /&gt;
|bgcolor=&amp;quot;#f7f7f7&amp;quot; width=&amp;quot;16px&amp;quot;| &lt;br /&gt;
|valign=&amp;quot;top&amp;quot;|&lt;br /&gt;
== Latviski ==&lt;br /&gt;
&lt;br /&gt;
=== &amp;#039;&amp;#039;&amp;#039;Kursi&amp;#039;&amp;#039;&amp;#039;===&lt;br /&gt;
2014 rudens:&lt;br /&gt;
&amp;lt;big&amp;gt;&lt;br /&gt;
&amp;lt;!-- Rudens semestris&lt;br /&gt;
[[LU-BST-b13 | BST-b]], &lt;br /&gt;
[[LU-DIP-b13 | DIP-b]],&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
[[LU-LSP-b14 | LSP-b]],&lt;br /&gt;
[[LU-VIV-m14 | VIV-m]], &lt;br /&gt;
[[LU-OSI-m14 | OSI-m]],&lt;br /&gt;
[[LU-DIP-b14 | DIP-b]],&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- Pavasara semestris&lt;br /&gt;
[[LU-MOP-b | MOP-b]], &lt;br /&gt;
[[LU-OSK-b | OSK-b]], &lt;br /&gt;
[[LU-BST-m | BST-m]], &lt;br /&gt;
[[LU-DIP-m | DIP-m]],&lt;br /&gt;
[[LU-DSP-b | DSP-b]], &lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&amp;lt;/big&amp;gt;&lt;br /&gt;
Specsemināri:&lt;br /&gt;
&amp;lt;big&amp;gt;&lt;br /&gt;
[[Specseminars-14 | KFS]],&lt;br /&gt;
[[LU-MLI-s | MLI]] (2014-pavasaris)&lt;br /&gt;
un [http://selavo.lv/sem citi]: &lt;br /&gt;
&amp;lt;/big&amp;gt;&lt;br /&gt;
&amp;lt;small&amp;gt;&lt;br /&gt;
* 2014: [[LU-MOP-b14 | MOP-b]], [[LU-OSK-b14 | OSK-b]], [[LU-BST-m13 | BST-m]], [[LU-DIP-m13 | DIP-m]], [[LU-DSP-b14 | DSP-b]], [[LU-MLI-s-2014-1 | MLI-s]]&lt;br /&gt;
* 2013: [[LU-LSP-b13 | LSP-b]], [[LU-BST-b13 | BST-b]], [[LU-VIV-m13 | VIV-m]], [[LU-DIP-b13 | DIP-b]], [[LU-MOP-b13 | MOP-b]], [[LU-BST-m13 | BST-m]], [[LU-DIP-m13 | DIP-m]], [[LU-DSP-b13 | DSP-b]]&lt;br /&gt;
* 2012: [[LU-LSP-b12 | LSP-b]], [[LU-DIP-b12 | DIP-b]], [[LU-BST-b12 | BST-b]], [[LU-VIV-m12 | VIV-m]], [[LU-OSI-m12 | OSI-m]], [[LU-BST-m12:index | BST-m]], [[LU-DIP-m12:index | DIP-m]], [[LU-DSP-B12:index | DSP-b]]&lt;br /&gt;
* 2011: [[LU-LSP-b11 | LSP-b]], [[LU-DIP-b11 | DIP-b]], [[LU-BST-b11 | BST-b]], [[LU-VIV-m11 | VIV-m]], [[LU-OSI-m11 | OSI-m]], [[LU-BST-M11:index | BST-m]], [[LU-DIP-M11:index | DIP-m]], [[LU-DSP-B11:index | DSP-b]]&lt;br /&gt;
* 2010: [[LU-LKP-B10:index | LKP-b]], [[LU-BST-B10:index | BST-b]], [[LU-DIP-B10:index | DIP-b]], [[LU-DSP-B10:index | DSP-b]], [[LU-VIV-M10:index | VIV-m]], [[LU-OSI-M10:index | OSI-m]], [[LU-BST-M10:index | BST-m]],  [[LU-DIP-M10:index | DIP-m]]&lt;br /&gt;
&amp;lt;/small&amp;gt;&lt;br /&gt;
&lt;br /&gt;
* [[Akadēmiskā_goda_sistēma | Akadēmiskā goda noteikumi]], [[Leo:Kursi | Kursu apraksti un arhīvs]], [[Kursu templates | (Wiki šabloni)]]&lt;br /&gt;
&lt;br /&gt;
=== Mācību piezīmes ===&lt;br /&gt;
* [[Maģistra Darba Struktūra | Maģistra / Bakalaura / kvalifikācijas / publikācijas darba struktūra]]&lt;br /&gt;
* [[LU::open-projects | Studentu projektu tēmas]] kursa, bakalaura un maģistra darbiem&lt;br /&gt;
* [[LU::poster-howto | Ieteikumi plakāta prezentācijas]] veidošanā&lt;br /&gt;
* [[Kā rakstīt labas publikācijas]]&lt;br /&gt;
* [[Pētniecība]] - ko tas nozīmē?&lt;br /&gt;
* [[Matematika datorikiem | Matemātika datoriķiem]] - ko ieteicams zināt un izprast&lt;br /&gt;
&lt;br /&gt;
=== Citas piezīmes ===&lt;br /&gt;
* [[Howto Ubuntu]] - Ubuntu un Linux piezīmes&lt;br /&gt;
* [[OS_X_for_Linux_people]] - Leo OSX piezīmes&lt;br /&gt;
&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;[[Leo:publications | Publikācijas un sadarbības projekti]]&amp;#039;&amp;#039;&amp;#039;. &lt;br /&gt;
&lt;br /&gt;
* [[Notikumi]], jaunumi, pasākumi &amp;#039;&amp;#039;&amp;#039;saistībā ar DiLab&amp;#039;&amp;#039;&amp;#039; aktivitatēm&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;[[Jaunumi]] ārpus DiLab&amp;#039;&amp;#039;&amp;#039;, jaunākie sasniegumi datorinženierijā un robotikā&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
* Efektīva un organizēta sadarbība:&lt;br /&gt;
** [[Leo:piezīmes:grupu_darbs | Strādājot grupās]] ar kopējiem dokumentiem un failiem&lt;br /&gt;
** [http://subversion.tigris.org/ Subversion] - Versiju kontroles sistēma&lt;br /&gt;
** [http://trac.edgewall.org/ TRAC] - (programmatūras) izstrādes kļūdu, uzdevumu un pieprasījumu uzskaites sistēma&lt;br /&gt;
&lt;br /&gt;
* [[ref.lv | Piezīmes]] par projektu vadību, karjeru, industriju, biznesu...&lt;br /&gt;
* [http://www.techhub.com/riga.html TechHub Riga] - tiem kam interesē startup-i&lt;br /&gt;
&lt;br /&gt;
* [[DILab:wishlist | DiLab-am vajag...]] - kas noderētu mūsu laboratorijai - instrumenti, materiāli, ...&lt;br /&gt;
* [[Leo:other_notes | Ārpus DiLab piezīmes]]&lt;br /&gt;
** Datoru veiktspējas testi: [[Benchmarks-Leo]]&lt;br /&gt;
** Autobusu saraksts: [[Leo:bus:Riga-Lici | Rīga - Līči]]&lt;br /&gt;
&lt;br /&gt;
=== Starp citu ===&lt;br /&gt;
&lt;br /&gt;
* [[BSD licence latviski]]&lt;br /&gt;
* [http://www.dzoka.lv/files/linux/gnuvpl.htm GPL licences latviskojums]&lt;br /&gt;
&lt;br /&gt;
* [[Programmēšanas valoda LV]]&lt;br /&gt;
&lt;br /&gt;
|bgcolor=&amp;quot;#f7f7f7&amp;quot; width=&amp;quot;16px&amp;quot;| &lt;br /&gt;
&lt;br /&gt;
|valign=&amp;quot;top&amp;quot;|&lt;br /&gt;
&lt;br /&gt;
== Kontaktinformācija ==&lt;br /&gt;
* Raiņa blvd. 19., 332.telpa., Rīga, LV-1586.&lt;br /&gt;
* Fakss: +371-67225039 &lt;br /&gt;
* Epasts: mansvards.uzvards @ gmail.com&lt;br /&gt;
* [http://bit.ly/selavo-cv CV in English], [http://bit.ly/selavo-cv-lv CV latviski], [[Leo:bibtex | Bibtex]]&lt;br /&gt;
* [http://bit.ly/KF9vui Twitter] [http://www.linkedin.com/in/leoselavo LinkedIn] [http://www.mendeley.com/profiles/leo-selavo/ Mendeley] [http://www.researchgate.net/profile/Leo_Selavo ResearchGate] [http://scholar.google.com/citations?user=wCDg9EcAAAAJ&amp;amp;hl=en Google Scholar]&lt;br /&gt;
&lt;br /&gt;
== Labumi ==&lt;br /&gt;
* [https://copy.com?r=aNCWfy Copy] - Dropbox alternatīva. Brīvi 15GB +5GB Tev un man. Dati šifrēti ar AES256.&lt;br /&gt;
* [https://db.tt/TdYUcX6 Dropbox] - viegli lietojams datu serveris. Brīvi 2 + 0.5GB Tev un man. &lt;br /&gt;
* [https://spideroak.com/download/referral/02fdcebe510bd30aa212638ca621dd64 SpiderOak] - līdzīgs Dropbox, bet dati šifrēti. Brīvi 2 + 1GB Tev un man.&lt;br /&gt;
&lt;br /&gt;
== In English ==&lt;br /&gt;
&lt;br /&gt;
* [[Leo:research | Academic activities]] and [http://cv.selavo.com CV]&lt;br /&gt;
&lt;br /&gt;
* [[OS X for Linux people]] - adventures with MAC OS X system&lt;br /&gt;
* [[Howto Ubuntu]] (or linux) - installing, setting up and using various software in Ubuntu&lt;br /&gt;
** Mediawiki, Mysql, Octave, Trac, Subversion, Ssh, Grep...&lt;br /&gt;
** [[Latex on Ubuntu]]&lt;br /&gt;
&lt;br /&gt;
==== Electronics ====&lt;br /&gt;
* [[EagleCAD | EagleCAD notes]] - (Leo piezīmes) PC board CAD program, has a freeware license for a reasonable set of features&lt;br /&gt;
* [[LED notes]] - LED links and resistor guide&lt;br /&gt;
&lt;br /&gt;
==== Selected projects ==== &lt;br /&gt;
* [http://mansos.net MansOS], SAD, GCDC Latvia &lt;br /&gt;
* [[Leo:SW-notes | Miscellaneous software notes]], TI laptops, etc...&lt;br /&gt;
* TinyOS: [[Leo:HowTo-install-TinyOs | How to install]] and [[Leo:TinyOS-development | working with motes]]&lt;br /&gt;
&lt;br /&gt;
== Misc ==&lt;br /&gt;
* Eurobot TV quals link: http://static.infomaniak.ch/livetv/player-v3.swf?cfg=http://static.infomaniak.ch/configvideo/nathaniel/eurobot/285_config.xml&lt;br /&gt;
* Leo - [[Leo:music | Music and more]]&lt;br /&gt;
&lt;br /&gt;
* [[Atziņas]] un domu graudi&lt;br /&gt;
&lt;br /&gt;
== Vaļasbrīžiem ==&lt;br /&gt;
&lt;br /&gt;
* [http://xkcd.com/730/ Advancētā elektronika...]&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Jaunumu arhīvs ==&lt;br /&gt;
* Sestais [http://bit.ly/viesentis6 Viedo sensoru seminārs] Latvijā, 12.12.2012.&lt;br /&gt;
* [http://bit.ly/RRKo05 Campus-Party 2012] - &amp;quot;the ultimate post-post-modern un-conference&amp;quot; Berlīnē. Bildes pa dienām: [http://bit.ly/cp2012-day1 1.], [http://bit.ly/cp2012-day2 2.], [http://bit.ly/cp2012-day3 3.], [http://bit.ly/cp2012-day4 4.], [http://bit.ly/cp2012-day5 5.], [http://bit.ly/cp2012-day6 6.]&lt;br /&gt;
&lt;br /&gt;
* [http://selavo.lv/viesentis/ Latvijas 4. viedo sensoru seminārs] 21.05.2012 15:00.&lt;br /&gt;
* Ar datoru vadāms automobilis, ar kuru mūsu komanda piedalījās [http://www.df.lu.lv/zinas/t/6695/ GCDC 2011 izaicinājumā].&lt;br /&gt;
* Viesentis (viedo sensoru) un kvantu skaitļošanas [http://selavo.lv/viesentis/ seminārs].&lt;br /&gt;
* [http://diena.lv/lat/politics/viedokli/aiza-starp-zinatni-un-biznesu-2011-01-29-1 Leo Dienai par aizu starp pētniekiem un uzņēmējiem]&lt;br /&gt;
* [http://selavo.lv/viesentis/ Viedo sensoru un biofotonikas seminārs] 20.10.2010 15:00 ASI.&lt;br /&gt;
&lt;br /&gt;
|}&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=User:Leo&amp;diff=4763</id>
		<title>User:Leo</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=User:Leo&amp;diff=4763"/>
		<updated>2013-11-08T06:53:04Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* &amp;#039;&amp;#039;&amp;#039;Kursi&amp;#039;&amp;#039;&amp;#039; */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;__NOTOC__&lt;br /&gt;
{{LeoTwitter|LeoWiki}}&lt;br /&gt;
{| &lt;br /&gt;
|bgcolor=&amp;quot;#f7f7f7&amp;quot; width=&amp;quot;16px&amp;quot;| &lt;br /&gt;
|valign=&amp;quot;top&amp;quot;|&lt;br /&gt;
== Latviski ==&lt;br /&gt;
&lt;br /&gt;
=== &amp;#039;&amp;#039;&amp;#039;Kursi&amp;#039;&amp;#039;&amp;#039;===&lt;br /&gt;
2013 rudens:&lt;br /&gt;
&amp;lt;big&amp;gt;&lt;br /&gt;
[[LU-LSP-b13 | LSP-b]], &lt;br /&gt;
[[LU-BST-b13 | BST-b]],&lt;br /&gt;
[[LU-VIV-m13 | VIV-m]],&lt;br /&gt;
[[LU-DIP-b13 | DIP-b]],&lt;br /&gt;
[http://selavo.lv/sem KFS un MLI specsemināri]&lt;br /&gt;
&amp;lt;/big&amp;gt;&lt;br /&gt;
&amp;lt;small&amp;gt;&lt;br /&gt;
* 2013 pavasaris: [[LU-MOP-b13 | MOP-b]], [[LU-BST-m13 | BST-m]], [[LU-DIP-m13 | DIP-m]], [[LU-DSP-b13 | DSP-b]]&lt;br /&gt;
* 2012: [[LU-LSP-b12 | LSP-b]], [[LU-DIP-b12 | DIP-b]], [[LU-BST-b12 | BST-b]], [[LU-VIV-m12 | VIV-m]], [[LU-OSI-m12 | OSI-m]], [[LU-BST-m12:index | BST-m]], [[LU-DIP-m12:index | DIP-m]], [[LU-DSP-B12:index | DSP-b]]&lt;br /&gt;
* 2011: [[LU-LSP-b11 | LSP-b]], [[LU-DIP-b11 | DIP-b]], [[LU-BST-b11 | BST-b]], [[LU-VIV-m11 | VIV-m]], [[LU-OSI-m11 | OSI-m]], [[LU-BST-M11:index | BST-m]], [[LU-DIP-M11:index | DIP-m]], [[LU-DSP-B11:index | DSP-b]]&lt;br /&gt;
* 2010: [[LU-LKP-B10:index | LKP-b]], [[LU-BST-B10:index | BST-b]], [[LU-DIP-B10:index | DIP-b]], [[LU-DSP-B10:index | DSP-b]], [[LU-VIV-M10:index | VIV-m]], [[LU-OSI-M10:index | OSI-m]], [[LU-BST-M10:index | BST-m]],  [[LU-DIP-M10:index | DIP-m]]&lt;br /&gt;
&amp;lt;/small&amp;gt;&lt;br /&gt;
&lt;br /&gt;
* [[Leo:Kursi | Kursu apraksti un arhīvs]], [[Kursu templates]]&lt;br /&gt;
&lt;br /&gt;
=== Mācību piezīmes ===&lt;br /&gt;
* [[Maģistra Darba Struktūra | Maģistra / Bakalaura / kvalifikācijas / publikācijas darba struktūra]]&lt;br /&gt;
* [[LU::open-projects | Studentu projektu tēmas]] kursa, bakalaura un maģistra darbiem&lt;br /&gt;
* [[LU::poster-howto | Ieteikumi plakāta prezentācijas]] veidošanā&lt;br /&gt;
* [[Kā rakstīt labas publikācijas]]&lt;br /&gt;
* [[Pētniecība]] - ko tas nozīmē?&lt;br /&gt;
* [[Matematika datorikiem | Matemātika datoriķiem]] - ko ieteicams zināt un izprast&lt;br /&gt;
&lt;br /&gt;
=== Citas piezīmes ===&lt;br /&gt;
* [[Howto Ubuntu]] - Ubuntu un Linux piezīmes&lt;br /&gt;
* [[OS_X_for_Linux_people]] - Leo OSX piezīmes&lt;br /&gt;
&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;[[Leo:publications | Publikācijas un sadarbības projekti]]&amp;#039;&amp;#039;&amp;#039;. &lt;br /&gt;
&lt;br /&gt;
* [[Notikumi]], jaunumi, pasākumi &amp;#039;&amp;#039;&amp;#039;saistībā ar DiLab&amp;#039;&amp;#039;&amp;#039; aktivitatēm&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;[[Jaunumi]] ārpus DiLab&amp;#039;&amp;#039;&amp;#039;, jaunākie sasniegumi datorinženierijā un robotikā&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
* Efektīva un organizēta sadarbība:&lt;br /&gt;
** [[Leo:piezīmes:grupu_darbs | Strādājot grupās]] ar kopējiem dokumentiem un failiem&lt;br /&gt;
** [http://subversion.tigris.org/ Subversion] - Versiju kontroles sistēma&lt;br /&gt;
** [http://trac.edgewall.org/ TRAC] - (programmatūras) izstrādes kļūdu, uzdevumu un pieprasījumu uzskaites sistēma&lt;br /&gt;
&lt;br /&gt;
* [[ref.lv | Piezīmes]] par projektu vadību, karjeru, industriju, biznesu...&lt;br /&gt;
* [http://www.techhub.com/riga.html TechHub Riga] - tiem kam interesē startup-i&lt;br /&gt;
&lt;br /&gt;
* [[DILab:wishlist | DiLab-am vajag...]] - kas noderētu mūsu laboratorijai - instrumenti, materiāli, ...&lt;br /&gt;
* [[Leo:other_notes | Ārpus DiLab piezīmes]]&lt;br /&gt;
** Autobusu saraksts: [[Leo:bus:Riga-Lici | Rīga - Līči]]&lt;br /&gt;
&lt;br /&gt;
=== Starp citu ===&lt;br /&gt;
&lt;br /&gt;
* [[BSD licence latviski]]&lt;br /&gt;
* [http://www.dzoka.lv/files/linux/gnuvpl.htm GPL licences latviskojums]&lt;br /&gt;
&lt;br /&gt;
* [[Programmēšanas valoda LV]]&lt;br /&gt;
&lt;br /&gt;
|bgcolor=&amp;quot;#f7f7f7&amp;quot; width=&amp;quot;16px&amp;quot;| &lt;br /&gt;
&lt;br /&gt;
|valign=&amp;quot;top&amp;quot;|&lt;br /&gt;
&lt;br /&gt;
== Kontaktinformācija ==&lt;br /&gt;
* Raiņa blvd. 19., 332.telpa., Rīga, LV-1586.&lt;br /&gt;
* Fakss: +371-67225039 &lt;br /&gt;
* Epasts: mansvards.uzvards @ gmail.com&lt;br /&gt;
* [http://bit.ly/selavo-cv CV in English], [http://bit.ly/selavo-cv-lv CV latviski], [[Leo:bibtex | Bibtex]]&lt;br /&gt;
* [http://bit.ly/KF9vui Twitter] [http://www.linkedin.com/in/leoselavo LinkedIn] [http://www.mendeley.com/profiles/leo-selavo/ Mendeley] [http://www.researchgate.net/profile/Leo_Selavo ResearchGate] [http://scholar.google.com/citations?user=wCDg9EcAAAAJ&amp;amp;hl=en Google Scholar]&lt;br /&gt;
&lt;br /&gt;
== Labumi ==&lt;br /&gt;
* [http://db.tt/TdYUcX6 Dropbox] - viegli lietojams datu serveris. Brīvi 2 + 0.5GB Tev un man. &lt;br /&gt;
* [https://spideroak.com/download/referral/02fdcebe510bd30aa212638ca621dd64 SpiderOak] - līdzīgs dropbox, bet dati šifrēti. Brīvi 2 + 1GB Tev un man.&lt;br /&gt;
&lt;br /&gt;
== In English ==&lt;br /&gt;
&lt;br /&gt;
* [[Leo:research | Academic activities]] and [http://cv.selavo.com CV]&lt;br /&gt;
&lt;br /&gt;
* [[OS X for Linux people]] - adventures with MAC OS X system&lt;br /&gt;
* [[Howto Ubuntu]] (or linux) - installing, setting up and using various software in Ubuntu&lt;br /&gt;
** Mediawiki, Mysql, Octave, Trac, Subversion, Ssh, Grep...&lt;br /&gt;
** [[Latex on Ubuntu]]&lt;br /&gt;
&lt;br /&gt;
==== Electronics ====&lt;br /&gt;
* [[EagleCAD | EagleCAD notes]] - (Leo piezīmes) PC board CAD program, has a freeware license for a reasonable set of features&lt;br /&gt;
* [[LED notes]] - LED links and resistor guide&lt;br /&gt;
&lt;br /&gt;
==== Selected projects ==== &lt;br /&gt;
* [http://mansos.net MansOS], SAD, GCDC Latvia &lt;br /&gt;
* [[Leo:SW-notes | Miscellaneous software notes]], TI laptops, etc...&lt;br /&gt;
* TinyOS: [[Leo:HowTo-install-TinyOs | How to install]] and [[Leo:TinyOS-development | working with motes]]&lt;br /&gt;
&lt;br /&gt;
== Misc ==&lt;br /&gt;
* Eurobot TV quals link: http://static.infomaniak.ch/livetv/player-v3.swf?cfg=http://static.infomaniak.ch/configvideo/nathaniel/eurobot/285_config.xml&lt;br /&gt;
* Leo - [[Leo:music | Music and more]]&lt;br /&gt;
&lt;br /&gt;
* [[Atziņas]] un domu graudi&lt;br /&gt;
&lt;br /&gt;
== Vaļasbrīžiem ==&lt;br /&gt;
&lt;br /&gt;
* [http://xkcd.com/730/ Advancētā elektronika...]&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Jaunumu arhīvs ==&lt;br /&gt;
* Sestais [http://bit.ly/viesentis6 Viedo sensoru seminārs] Latvijā, 12.12.2012.&lt;br /&gt;
* [http://bit.ly/RRKo05 Campus-Party 2012] - &amp;quot;the ultimate post-post-modern un-conference&amp;quot; Berlīnē. Bildes pa dienām: [http://bit.ly/cp2012-day1 1.], [http://bit.ly/cp2012-day2 2.], [http://bit.ly/cp2012-day3 3.], [http://bit.ly/cp2012-day4 4.], [http://bit.ly/cp2012-day5 5.], [http://bit.ly/cp2012-day6 6.]&lt;br /&gt;
&lt;br /&gt;
* [http://selavo.lv/viesentis/ Latvijas 4. viedo sensoru seminārs] 21.05.2012 15:00.&lt;br /&gt;
* Ar datoru vadāms automobilis, ar kuru mūsu komanda piedalījās [http://www.df.lu.lv/zinas/t/6695/ GCDC 2011 izaicinājumā].&lt;br /&gt;
* Viesentis (viedo sensoru) un kvantu skaitļošanas [http://selavo.lv/viesentis/ seminārs].&lt;br /&gt;
* [http://diena.lv/lat/politics/viedokli/aiza-starp-zinatni-un-biznesu-2011-01-29-1 Leo Dienai par aizu starp pētniekiem un uzņēmējiem]&lt;br /&gt;
* [http://selavo.lv/viesentis/ Viedo sensoru un biofotonikas seminārs] 20.10.2010 15:00 ASI.&lt;br /&gt;
&lt;br /&gt;
|}&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b13&amp;diff=4762</id>
		<title>LU-DIP-b13</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b13&amp;diff=4762"/>
		<updated>2013-11-08T06:50:38Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: /* Kalendārs */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 02.09.2013 &lt;br /&gt;
- 09.09.2013&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 06.09.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 13.09.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 20.09.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 27.09.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 04.10.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.02.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 11.10.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 18.10.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 25.10.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L08-DLXProcessorAndInstructions.1.01.pdf DLX procesors un instrukcijas.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 01.11.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 08.11.2013&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 15.11.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP3]]&lt;br /&gt;
|-&lt;br /&gt;
| 22.11.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
|-&lt;br /&gt;
| 29.11.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| 06.12.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| 13.12.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2013 &lt;br /&gt;
- 01.01.2014&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2014, &lt;br /&gt;
xx.01.2014&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2014&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2014&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
* [[DIPb10:KP3 | KP3]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Literatūra ==&lt;br /&gt;
&lt;br /&gt;
* [http://books.google.lv/books?id=1lD9LZRcIZ8C&amp;amp;printsec=frontcover&amp;amp;source=gbs_navlinks_s#v=onepage&amp;amp;q=&amp;amp;f=false Computer organization and design: the hardware/software interface]&lt;br /&gt;
** [http://owlhouse.csie.nctu.edu.tw/old/CO2004/ch1-4_old.ppt Computer Organization &amp;amp; Design The Hardware/Software Interface, 2nd Edition] PPT 5.89MB (lekciju slaidi no National Chiao Tung University)&lt;br /&gt;
** [http://owlhouse.csie.nctu.edu.tw/old/CO2004/CO2004_lecture_notes.ppt Computer Organization &amp;amp; Design The Hardware/Software Interface, 3nd Edition] PPT 1.86MB (lekciju slaidi no National Chiao Tung University)&lt;br /&gt;
&lt;br /&gt;
* [http://books.google.lv/books?id=57UIPoLt3tkC&amp;amp;printsec=frontcover&amp;amp;source=gbs_v2_summary_r&amp;amp;cad=0#v=onepage&amp;amp;q=&amp;amp;f=false Computer architecture: a quantitative approach]&lt;br /&gt;
&lt;br /&gt;
* [http://books.google.lv/books?id=3aN89DhGwI4C&amp;amp;printsec=frontcover&amp;amp;source=gbs_v2_summary_r&amp;amp;cad=0#v=onepage&amp;amp;q=&amp;amp;f=false The designer&amp;#039;s guide to VHDL]&lt;br /&gt;
&lt;br /&gt;
== Saites ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com Xilinx kompānijas (FPGA ražotājs) portāls]&lt;br /&gt;
&lt;br /&gt;
==== Digital design textbooks @ Digilent Inc.====&lt;br /&gt;
&lt;br /&gt;
* [http://www.digilentinc.com/Data/Textbooks/Intro_to_Digital_Design-Digilent-Verilog_Online.pdf Introduction to Digital Design - Verilog Edition] PDF 5.81MB&lt;br /&gt;
* [http://www.digilentinc.com/Data/Textbooks/Intro_Digital_Design-Digilent-VHDL_Online.pdf Introduction to Digital Design - VHDL Edition] PDF 6.68MB&lt;br /&gt;
* Real Digital - A hands-on approach to digital design&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M1/RealDigital_Module_1.pdf Module 1: Introduction to Electronic Circuits] PDF 465.54KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M2/RealDigital_Module_2.pdf Module 2: Introduction to Digilent&amp;#039;s Digital Design Circuit Boards] PDF 65.94KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M3/RealDigital_Module_3.pdf Module 3: Circuit Structure with an Introduction to CAD Tools] PDF 247.60KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M4/RealDigital_Module_4.pdf Module 4: Logic Minimization] PDF 353.07KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M5/RealDigital_Module_5.pdf Module 5: Introduction to VHDL] PDF 197.37KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M6/RealDigital_Module_6.pdf Module 6: Combinational Circuit Blocks] PDF 244.46KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M7/RealDigital_Module_7.pdf Module 7: Combinational Arithmetic Circuits] PDF 361.00KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M8/RealDigital_Module_8.pdf Module 8: Signal Propagation Delays] PDF 126.77KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M9/RealDigital_Module_9.pdf Module 9: Basic Memory Circuits] PDF 232.41KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M10/RealDigital_Module_10.pdf Module 10: The Structural Design of Sequential Circuits] PDF 245.58KB&lt;br /&gt;
&lt;br /&gt;
==== Xilinx ISE WebPACK 12.2 ====&lt;br /&gt;
&lt;br /&gt;
* [https://secure.xilinx.com/webreg/register.do?group=dlc&amp;amp;htmlfile=&amp;amp;emailFile=&amp;amp;cancellink=&amp;amp;eFrom=&amp;amp;eSubject=&amp;amp;version=12.2&amp;amp;akdm=1&amp;amp;filename=Xilinx_ISE_DS_Lin_12.2_M.63c.1.1.tar Installer for Linux] TAR/GZ 3.02GB (nepieciešams reģistrēties www.xilinx.com)&lt;br /&gt;
&lt;br /&gt;
* [https://secure.xilinx.com/webreg/register.do?group=dlc&amp;amp;htmlfile=&amp;amp;emailFile=&amp;amp;cancellink=&amp;amp;eFrom=&amp;amp;eSubject=&amp;amp;version=12.2&amp;amp;akdm=1&amp;amp;filename=Xilinx_ISE_DS_Win_12.2_M.63c.1.1.tar Installer for Windows] TAR/GZ 2.96GB (nepieciešams reģistrēties www.xilinx.com)&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/irn.pdf ISE Design Suite 12: Installation, Licensing, and Release Notes] PDF 1.44MB&lt;br /&gt;
&lt;br /&gt;
* [http://ubuntuforums.org/showthread.php?t=1547435 Xilinx ISE WebPACK 12.2 on Ubuntu 10.04 LTS]&lt;br /&gt;
&lt;br /&gt;
* [http://rmdir.de/~michael/xilinx/ Xilinx JTAG tools on Linux without proprietary kernel modules]&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/ise_tutorial_ug695.pdf ISE In-Depth Tutorial] PDF 5.04MB&lt;br /&gt;
&lt;br /&gt;
* [https://xilinx.webex.com/ec0605l/eventcenter/recording/recordAction.do?theAction=poprecord&amp;amp;actname=%2Feventcenter%2Fframe%2Fg.do&amp;amp;apiname=lsr.php&amp;amp;renewticket=0&amp;amp;renewticket=0&amp;amp;actappname=ec0605l&amp;amp;entappname=url0107l&amp;amp;needFilter=false&amp;amp;&amp;amp;isurlact=true&amp;amp;entactname=%2FnbrRecordingURL.do&amp;amp;rID=31975327&amp;amp;rKey=B2CB97CBBB0026E3&amp;amp;recordID=31975327&amp;amp;rnd=7154034615&amp;amp;siteurl=xilinx&amp;amp;SP=EC&amp;amp;AT=pb&amp;amp;format=short ISE Design Suite: Logic Edition – A Quick Tour] WMV 47.50MB&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/plugin_ism.pdf ISim User Guide] PDF 1.96MB&lt;br /&gt;
&lt;br /&gt;
* [https://xilinx.webex.com/ec0605l/eventcenter/recording/recordAction.do;jsessionid=PHcmMMRfyPT41QMhMNm1ryhh2bK1LyX1bM8bnkS9Qp7qgTTCG2S9!1328041475?theAction=poprecord&amp;amp;actname=%2Feventcenter%2Fframe%2Fg.do&amp;amp;apiname=lsr.php&amp;amp;renewticket=0&amp;amp;renewticket=0&amp;amp;actappname=ec0605l&amp;amp;entappname=url0107l&amp;amp;needFilter=false&amp;amp;&amp;amp;isurlact=true&amp;amp;entactname=%2FnbrRecordingURL.do&amp;amp;rID=41800312&amp;amp;rKey=82ac13e94441c96c&amp;amp;recordID=41800312&amp;amp;rnd=5574793851&amp;amp;siteurl=xilinx&amp;amp;SP=EC&amp;amp;AT=pb&amp;amp;format=short How to Use the ISE Simulator (ISim)] WMV 40.90MB&lt;br /&gt;
&lt;br /&gt;
==== Xilinx Spartan-3E ====&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/boards_and_kits/ug230.pdf Xilinx Spartan-3E FPGA Starter Kit Board User Guide] PDF 7.34MB&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/spartan3e_scm.pdf Spartan-3E Libraries Guide for Schematic Designs] PDF 9.19MB&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/spartan3e_hdl.pdf Spartan-3E Libraries Guide for HDL Designs] PDF 3.94MB&lt;br /&gt;
&lt;br /&gt;
==== Video applications using FPGA ====&lt;br /&gt;
&lt;br /&gt;
* [http://www.stevechamberlin.com/cpu/2009/06/21/fpga-pong/ FPGA Pong] by Steve Chamberlin&lt;br /&gt;
* [http://www.fpga4fun.com/PongGame.html Pong Game] by Jean P. Nicolle&lt;br /&gt;
&lt;br /&gt;
==== HDL tutorials ====&lt;br /&gt;
&lt;br /&gt;
* [http://www.eecs.harvard.edu/cs141/resources/verilog-tutorial.pdf Verilog Tutorial I (10 pages)] PDF 69.58KB&lt;br /&gt;
* [http://www.ece.umd.edu/class/enee359a.S2008/verilog_tutorial.pdf Verilog Tutorial II (227 pages)] PDF 876.25KB&lt;br /&gt;
* [http://www.gmvhdl.com/VHDL.html VHDL Tutorial I (15 pages)]&lt;br /&gt;
* [http://lslwww.epfl.ch/pages/teaching/cours_lsl/sl_info/vhdl-tutorial.pdf VHDL Tutorial II (84 pages)] PDF 391.95KB&lt;br /&gt;
&lt;br /&gt;
==== Atsauksmes par kursu ====&lt;br /&gt;
* DIP 2012-1-m: [http://bit.ly/MVbhuZ] [http://bit.ly/Lvsur2] [http://bit.ly/MX4Upj]&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
==== Dažādi ====&lt;br /&gt;
* [http://www.cpushack.com/ CPU Shack]&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b13&amp;diff=4761</id>
		<title>LU-DIP-b13</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b13&amp;diff=4761"/>
		<updated>2013-11-08T06:48:42Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 02.09.2013 &lt;br /&gt;
- 09.09.2013&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 06.09.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 13.09.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 20.09.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 27.09.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 04.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.02.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 11.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 18.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 25.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L08-DLXProcessorAndInstructions.1.01.pdf DLX procesors un instrukcijas.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 01.11.2012&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 08.11.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 15.11.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP3]]&lt;br /&gt;
|-&lt;br /&gt;
| 22.11.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
|-&lt;br /&gt;
| 29.11.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| 06.12.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| 13.12.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2012 &lt;br /&gt;
- 01.01.2013&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2013, &lt;br /&gt;
xx.01.2013&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2013&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2013&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
* [[DIPb10:KP3 | KP3]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Literatūra ==&lt;br /&gt;
&lt;br /&gt;
* [http://books.google.lv/books?id=1lD9LZRcIZ8C&amp;amp;printsec=frontcover&amp;amp;source=gbs_navlinks_s#v=onepage&amp;amp;q=&amp;amp;f=false Computer organization and design: the hardware/software interface]&lt;br /&gt;
** [http://owlhouse.csie.nctu.edu.tw/old/CO2004/ch1-4_old.ppt Computer Organization &amp;amp; Design The Hardware/Software Interface, 2nd Edition] PPT 5.89MB (lekciju slaidi no National Chiao Tung University)&lt;br /&gt;
** [http://owlhouse.csie.nctu.edu.tw/old/CO2004/CO2004_lecture_notes.ppt Computer Organization &amp;amp; Design The Hardware/Software Interface, 3nd Edition] PPT 1.86MB (lekciju slaidi no National Chiao Tung University)&lt;br /&gt;
&lt;br /&gt;
* [http://books.google.lv/books?id=57UIPoLt3tkC&amp;amp;printsec=frontcover&amp;amp;source=gbs_v2_summary_r&amp;amp;cad=0#v=onepage&amp;amp;q=&amp;amp;f=false Computer architecture: a quantitative approach]&lt;br /&gt;
&lt;br /&gt;
* [http://books.google.lv/books?id=3aN89DhGwI4C&amp;amp;printsec=frontcover&amp;amp;source=gbs_v2_summary_r&amp;amp;cad=0#v=onepage&amp;amp;q=&amp;amp;f=false The designer&amp;#039;s guide to VHDL]&lt;br /&gt;
&lt;br /&gt;
== Saites ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com Xilinx kompānijas (FPGA ražotājs) portāls]&lt;br /&gt;
&lt;br /&gt;
==== Digital design textbooks @ Digilent Inc.====&lt;br /&gt;
&lt;br /&gt;
* [http://www.digilentinc.com/Data/Textbooks/Intro_to_Digital_Design-Digilent-Verilog_Online.pdf Introduction to Digital Design - Verilog Edition] PDF 5.81MB&lt;br /&gt;
* [http://www.digilentinc.com/Data/Textbooks/Intro_Digital_Design-Digilent-VHDL_Online.pdf Introduction to Digital Design - VHDL Edition] PDF 6.68MB&lt;br /&gt;
* Real Digital - A hands-on approach to digital design&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M1/RealDigital_Module_1.pdf Module 1: Introduction to Electronic Circuits] PDF 465.54KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M2/RealDigital_Module_2.pdf Module 2: Introduction to Digilent&amp;#039;s Digital Design Circuit Boards] PDF 65.94KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M3/RealDigital_Module_3.pdf Module 3: Circuit Structure with an Introduction to CAD Tools] PDF 247.60KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M4/RealDigital_Module_4.pdf Module 4: Logic Minimization] PDF 353.07KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M5/RealDigital_Module_5.pdf Module 5: Introduction to VHDL] PDF 197.37KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M6/RealDigital_Module_6.pdf Module 6: Combinational Circuit Blocks] PDF 244.46KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M7/RealDigital_Module_7.pdf Module 7: Combinational Arithmetic Circuits] PDF 361.00KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M8/RealDigital_Module_8.pdf Module 8: Signal Propagation Delays] PDF 126.77KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M9/RealDigital_Module_9.pdf Module 9: Basic Memory Circuits] PDF 232.41KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M10/RealDigital_Module_10.pdf Module 10: The Structural Design of Sequential Circuits] PDF 245.58KB&lt;br /&gt;
&lt;br /&gt;
==== Xilinx ISE WebPACK 12.2 ====&lt;br /&gt;
&lt;br /&gt;
* [https://secure.xilinx.com/webreg/register.do?group=dlc&amp;amp;htmlfile=&amp;amp;emailFile=&amp;amp;cancellink=&amp;amp;eFrom=&amp;amp;eSubject=&amp;amp;version=12.2&amp;amp;akdm=1&amp;amp;filename=Xilinx_ISE_DS_Lin_12.2_M.63c.1.1.tar Installer for Linux] TAR/GZ 3.02GB (nepieciešams reģistrēties www.xilinx.com)&lt;br /&gt;
&lt;br /&gt;
* [https://secure.xilinx.com/webreg/register.do?group=dlc&amp;amp;htmlfile=&amp;amp;emailFile=&amp;amp;cancellink=&amp;amp;eFrom=&amp;amp;eSubject=&amp;amp;version=12.2&amp;amp;akdm=1&amp;amp;filename=Xilinx_ISE_DS_Win_12.2_M.63c.1.1.tar Installer for Windows] TAR/GZ 2.96GB (nepieciešams reģistrēties www.xilinx.com)&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/irn.pdf ISE Design Suite 12: Installation, Licensing, and Release Notes] PDF 1.44MB&lt;br /&gt;
&lt;br /&gt;
* [http://ubuntuforums.org/showthread.php?t=1547435 Xilinx ISE WebPACK 12.2 on Ubuntu 10.04 LTS]&lt;br /&gt;
&lt;br /&gt;
* [http://rmdir.de/~michael/xilinx/ Xilinx JTAG tools on Linux without proprietary kernel modules]&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/ise_tutorial_ug695.pdf ISE In-Depth Tutorial] PDF 5.04MB&lt;br /&gt;
&lt;br /&gt;
* [https://xilinx.webex.com/ec0605l/eventcenter/recording/recordAction.do?theAction=poprecord&amp;amp;actname=%2Feventcenter%2Fframe%2Fg.do&amp;amp;apiname=lsr.php&amp;amp;renewticket=0&amp;amp;renewticket=0&amp;amp;actappname=ec0605l&amp;amp;entappname=url0107l&amp;amp;needFilter=false&amp;amp;&amp;amp;isurlact=true&amp;amp;entactname=%2FnbrRecordingURL.do&amp;amp;rID=31975327&amp;amp;rKey=B2CB97CBBB0026E3&amp;amp;recordID=31975327&amp;amp;rnd=7154034615&amp;amp;siteurl=xilinx&amp;amp;SP=EC&amp;amp;AT=pb&amp;amp;format=short ISE Design Suite: Logic Edition – A Quick Tour] WMV 47.50MB&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/plugin_ism.pdf ISim User Guide] PDF 1.96MB&lt;br /&gt;
&lt;br /&gt;
* [https://xilinx.webex.com/ec0605l/eventcenter/recording/recordAction.do;jsessionid=PHcmMMRfyPT41QMhMNm1ryhh2bK1LyX1bM8bnkS9Qp7qgTTCG2S9!1328041475?theAction=poprecord&amp;amp;actname=%2Feventcenter%2Fframe%2Fg.do&amp;amp;apiname=lsr.php&amp;amp;renewticket=0&amp;amp;renewticket=0&amp;amp;actappname=ec0605l&amp;amp;entappname=url0107l&amp;amp;needFilter=false&amp;amp;&amp;amp;isurlact=true&amp;amp;entactname=%2FnbrRecordingURL.do&amp;amp;rID=41800312&amp;amp;rKey=82ac13e94441c96c&amp;amp;recordID=41800312&amp;amp;rnd=5574793851&amp;amp;siteurl=xilinx&amp;amp;SP=EC&amp;amp;AT=pb&amp;amp;format=short How to Use the ISE Simulator (ISim)] WMV 40.90MB&lt;br /&gt;
&lt;br /&gt;
==== Xilinx Spartan-3E ====&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/boards_and_kits/ug230.pdf Xilinx Spartan-3E FPGA Starter Kit Board User Guide] PDF 7.34MB&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/spartan3e_scm.pdf Spartan-3E Libraries Guide for Schematic Designs] PDF 9.19MB&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/spartan3e_hdl.pdf Spartan-3E Libraries Guide for HDL Designs] PDF 3.94MB&lt;br /&gt;
&lt;br /&gt;
==== Video applications using FPGA ====&lt;br /&gt;
&lt;br /&gt;
* [http://www.stevechamberlin.com/cpu/2009/06/21/fpga-pong/ FPGA Pong] by Steve Chamberlin&lt;br /&gt;
* [http://www.fpga4fun.com/PongGame.html Pong Game] by Jean P. Nicolle&lt;br /&gt;
&lt;br /&gt;
==== HDL tutorials ====&lt;br /&gt;
&lt;br /&gt;
* [http://www.eecs.harvard.edu/cs141/resources/verilog-tutorial.pdf Verilog Tutorial I (10 pages)] PDF 69.58KB&lt;br /&gt;
* [http://www.ece.umd.edu/class/enee359a.S2008/verilog_tutorial.pdf Verilog Tutorial II (227 pages)] PDF 876.25KB&lt;br /&gt;
* [http://www.gmvhdl.com/VHDL.html VHDL Tutorial I (15 pages)]&lt;br /&gt;
* [http://lslwww.epfl.ch/pages/teaching/cours_lsl/sl_info/vhdl-tutorial.pdf VHDL Tutorial II (84 pages)] PDF 391.95KB&lt;br /&gt;
&lt;br /&gt;
==== Atsauksmes par kursu ====&lt;br /&gt;
* DIP 2012-1-m: [http://bit.ly/MVbhuZ] [http://bit.ly/Lvsur2] [http://bit.ly/MX4Upj]&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
==== Dažādi ====&lt;br /&gt;
* [http://www.cpushack.com/ CPU Shack]&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b13&amp;diff=4760</id>
		<title>LU-DIP-b13</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b13&amp;diff=4760"/>
		<updated>2013-11-08T06:44:27Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: New page: {{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}  * Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo * {{KursiGGroup|lu-dip-b}}  == Darbu iesniegšana un vērtēšana == ...&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 27.08.2013 &lt;br /&gt;
- 02.09.2013&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 07.09.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 14.09.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 21.09.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 28.09.2013&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 05.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.02.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 12.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 19.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 26.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L08-DLXProcessorAndInstructions.1.01.pdf DLX procesors un instrukcijas.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 02.11.2012&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 09.11.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 16.11.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP3]]&lt;br /&gt;
|-&lt;br /&gt;
| 23.11.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
|-&lt;br /&gt;
| 30.11.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| 07.12.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| 14.12.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2012 &lt;br /&gt;
- 01.01.2013&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2013, &lt;br /&gt;
xx.01.2013&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2013&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2013&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
* [[DIPb10:KP3 | KP3]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Literatūra ==&lt;br /&gt;
&lt;br /&gt;
* [http://books.google.lv/books?id=1lD9LZRcIZ8C&amp;amp;printsec=frontcover&amp;amp;source=gbs_navlinks_s#v=onepage&amp;amp;q=&amp;amp;f=false Computer organization and design: the hardware/software interface]&lt;br /&gt;
** [http://owlhouse.csie.nctu.edu.tw/old/CO2004/ch1-4_old.ppt Computer Organization &amp;amp; Design The Hardware/Software Interface, 2nd Edition] PPT 5.89MB (lekciju slaidi no National Chiao Tung University)&lt;br /&gt;
** [http://owlhouse.csie.nctu.edu.tw/old/CO2004/CO2004_lecture_notes.ppt Computer Organization &amp;amp; Design The Hardware/Software Interface, 3nd Edition] PPT 1.86MB (lekciju slaidi no National Chiao Tung University)&lt;br /&gt;
&lt;br /&gt;
* [http://books.google.lv/books?id=57UIPoLt3tkC&amp;amp;printsec=frontcover&amp;amp;source=gbs_v2_summary_r&amp;amp;cad=0#v=onepage&amp;amp;q=&amp;amp;f=false Computer architecture: a quantitative approach]&lt;br /&gt;
&lt;br /&gt;
* [http://books.google.lv/books?id=3aN89DhGwI4C&amp;amp;printsec=frontcover&amp;amp;source=gbs_v2_summary_r&amp;amp;cad=0#v=onepage&amp;amp;q=&amp;amp;f=false The designer&amp;#039;s guide to VHDL]&lt;br /&gt;
&lt;br /&gt;
== Saites ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com Xilinx kompānijas (FPGA ražotājs) portāls]&lt;br /&gt;
&lt;br /&gt;
==== Digital design textbooks @ Digilent Inc.====&lt;br /&gt;
&lt;br /&gt;
* [http://www.digilentinc.com/Data/Textbooks/Intro_to_Digital_Design-Digilent-Verilog_Online.pdf Introduction to Digital Design - Verilog Edition] PDF 5.81MB&lt;br /&gt;
* [http://www.digilentinc.com/Data/Textbooks/Intro_Digital_Design-Digilent-VHDL_Online.pdf Introduction to Digital Design - VHDL Edition] PDF 6.68MB&lt;br /&gt;
* Real Digital - A hands-on approach to digital design&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M1/RealDigital_Module_1.pdf Module 1: Introduction to Electronic Circuits] PDF 465.54KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M2/RealDigital_Module_2.pdf Module 2: Introduction to Digilent&amp;#039;s Digital Design Circuit Boards] PDF 65.94KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M3/RealDigital_Module_3.pdf Module 3: Circuit Structure with an Introduction to CAD Tools] PDF 247.60KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M4/RealDigital_Module_4.pdf Module 4: Logic Minimization] PDF 353.07KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M5/RealDigital_Module_5.pdf Module 5: Introduction to VHDL] PDF 197.37KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M6/RealDigital_Module_6.pdf Module 6: Combinational Circuit Blocks] PDF 244.46KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M7/RealDigital_Module_7.pdf Module 7: Combinational Arithmetic Circuits] PDF 361.00KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M8/RealDigital_Module_8.pdf Module 8: Signal Propagation Delays] PDF 126.77KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M9/RealDigital_Module_9.pdf Module 9: Basic Memory Circuits] PDF 232.41KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M10/RealDigital_Module_10.pdf Module 10: The Structural Design of Sequential Circuits] PDF 245.58KB&lt;br /&gt;
&lt;br /&gt;
==== Xilinx ISE WebPACK 12.2 ====&lt;br /&gt;
&lt;br /&gt;
* [https://secure.xilinx.com/webreg/register.do?group=dlc&amp;amp;htmlfile=&amp;amp;emailFile=&amp;amp;cancellink=&amp;amp;eFrom=&amp;amp;eSubject=&amp;amp;version=12.2&amp;amp;akdm=1&amp;amp;filename=Xilinx_ISE_DS_Lin_12.2_M.63c.1.1.tar Installer for Linux] TAR/GZ 3.02GB (nepieciešams reģistrēties www.xilinx.com)&lt;br /&gt;
&lt;br /&gt;
* [https://secure.xilinx.com/webreg/register.do?group=dlc&amp;amp;htmlfile=&amp;amp;emailFile=&amp;amp;cancellink=&amp;amp;eFrom=&amp;amp;eSubject=&amp;amp;version=12.2&amp;amp;akdm=1&amp;amp;filename=Xilinx_ISE_DS_Win_12.2_M.63c.1.1.tar Installer for Windows] TAR/GZ 2.96GB (nepieciešams reģistrēties www.xilinx.com)&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/irn.pdf ISE Design Suite 12: Installation, Licensing, and Release Notes] PDF 1.44MB&lt;br /&gt;
&lt;br /&gt;
* [http://ubuntuforums.org/showthread.php?t=1547435 Xilinx ISE WebPACK 12.2 on Ubuntu 10.04 LTS]&lt;br /&gt;
&lt;br /&gt;
* [http://rmdir.de/~michael/xilinx/ Xilinx JTAG tools on Linux without proprietary kernel modules]&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/ise_tutorial_ug695.pdf ISE In-Depth Tutorial] PDF 5.04MB&lt;br /&gt;
&lt;br /&gt;
* [https://xilinx.webex.com/ec0605l/eventcenter/recording/recordAction.do?theAction=poprecord&amp;amp;actname=%2Feventcenter%2Fframe%2Fg.do&amp;amp;apiname=lsr.php&amp;amp;renewticket=0&amp;amp;renewticket=0&amp;amp;actappname=ec0605l&amp;amp;entappname=url0107l&amp;amp;needFilter=false&amp;amp;&amp;amp;isurlact=true&amp;amp;entactname=%2FnbrRecordingURL.do&amp;amp;rID=31975327&amp;amp;rKey=B2CB97CBBB0026E3&amp;amp;recordID=31975327&amp;amp;rnd=7154034615&amp;amp;siteurl=xilinx&amp;amp;SP=EC&amp;amp;AT=pb&amp;amp;format=short ISE Design Suite: Logic Edition – A Quick Tour] WMV 47.50MB&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/plugin_ism.pdf ISim User Guide] PDF 1.96MB&lt;br /&gt;
&lt;br /&gt;
* [https://xilinx.webex.com/ec0605l/eventcenter/recording/recordAction.do;jsessionid=PHcmMMRfyPT41QMhMNm1ryhh2bK1LyX1bM8bnkS9Qp7qgTTCG2S9!1328041475?theAction=poprecord&amp;amp;actname=%2Feventcenter%2Fframe%2Fg.do&amp;amp;apiname=lsr.php&amp;amp;renewticket=0&amp;amp;renewticket=0&amp;amp;actappname=ec0605l&amp;amp;entappname=url0107l&amp;amp;needFilter=false&amp;amp;&amp;amp;isurlact=true&amp;amp;entactname=%2FnbrRecordingURL.do&amp;amp;rID=41800312&amp;amp;rKey=82ac13e94441c96c&amp;amp;recordID=41800312&amp;amp;rnd=5574793851&amp;amp;siteurl=xilinx&amp;amp;SP=EC&amp;amp;AT=pb&amp;amp;format=short How to Use the ISE Simulator (ISim)] WMV 40.90MB&lt;br /&gt;
&lt;br /&gt;
==== Xilinx Spartan-3E ====&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/boards_and_kits/ug230.pdf Xilinx Spartan-3E FPGA Starter Kit Board User Guide] PDF 7.34MB&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/spartan3e_scm.pdf Spartan-3E Libraries Guide for Schematic Designs] PDF 9.19MB&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/spartan3e_hdl.pdf Spartan-3E Libraries Guide for HDL Designs] PDF 3.94MB&lt;br /&gt;
&lt;br /&gt;
==== Video applications using FPGA ====&lt;br /&gt;
&lt;br /&gt;
* [http://www.stevechamberlin.com/cpu/2009/06/21/fpga-pong/ FPGA Pong] by Steve Chamberlin&lt;br /&gt;
* [http://www.fpga4fun.com/PongGame.html Pong Game] by Jean P. Nicolle&lt;br /&gt;
&lt;br /&gt;
==== HDL tutorials ====&lt;br /&gt;
&lt;br /&gt;
* [http://www.eecs.harvard.edu/cs141/resources/verilog-tutorial.pdf Verilog Tutorial I (10 pages)] PDF 69.58KB&lt;br /&gt;
* [http://www.ece.umd.edu/class/enee359a.S2008/verilog_tutorial.pdf Verilog Tutorial II (227 pages)] PDF 876.25KB&lt;br /&gt;
* [http://www.gmvhdl.com/VHDL.html VHDL Tutorial I (15 pages)]&lt;br /&gt;
* [http://lslwww.epfl.ch/pages/teaching/cours_lsl/sl_info/vhdl-tutorial.pdf VHDL Tutorial II (84 pages)] PDF 391.95KB&lt;br /&gt;
&lt;br /&gt;
==== Atsauksmes par kursu ====&lt;br /&gt;
* DIP 2012-1-m: [http://bit.ly/MVbhuZ] [http://bit.ly/Lvsur2] [http://bit.ly/MX4Upj]&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
==== Dažādi ====&lt;br /&gt;
* [http://www.cpushack.com/ CPU Shack]&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b12&amp;diff=4133</id>
		<title>LU-DIP-b12</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b12&amp;diff=4133"/>
		<updated>2012-12-20T10:41:15Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 27.08.2012 &lt;br /&gt;
- 02.09.2012&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 07.09.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 14.09.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 21.09.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 28.09.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 05.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.02.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 12.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 19.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 26.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L08-DLXProcessorAndInstructions.1.01.pdf DLX procesors un instrukcijas.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 02.11.2012&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 09.11.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 16.11.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP3]]&lt;br /&gt;
|-&lt;br /&gt;
| 23.11.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
|-&lt;br /&gt;
| 30.11.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| 07.12.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| 14.12.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2012 &lt;br /&gt;
- 01.01.2013&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2013, &lt;br /&gt;
xx.01.2013&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2013&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2013&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
* [[DIPb10:KP3 | KP3]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Literatūra ==&lt;br /&gt;
&lt;br /&gt;
* [http://books.google.lv/books?id=1lD9LZRcIZ8C&amp;amp;printsec=frontcover&amp;amp;source=gbs_navlinks_s#v=onepage&amp;amp;q=&amp;amp;f=false Computer organization and design: the hardware/software interface]&lt;br /&gt;
** [http://owlhouse.csie.nctu.edu.tw/old/CO2004/ch1-4_old.ppt Computer Organization &amp;amp; Design The Hardware/Software Interface, 2nd Edition] PPT 5.89MB (lekciju slaidi no National Chiao Tung University)&lt;br /&gt;
** [http://owlhouse.csie.nctu.edu.tw/old/CO2004/CO2004_lecture_notes.ppt Computer Organization &amp;amp; Design The Hardware/Software Interface, 3nd Edition] PPT 1.86MB (lekciju slaidi no National Chiao Tung University)&lt;br /&gt;
&lt;br /&gt;
* [http://books.google.lv/books?id=57UIPoLt3tkC&amp;amp;printsec=frontcover&amp;amp;source=gbs_v2_summary_r&amp;amp;cad=0#v=onepage&amp;amp;q=&amp;amp;f=false Computer architecture: a quantitative approach]&lt;br /&gt;
&lt;br /&gt;
* [http://books.google.lv/books?id=3aN89DhGwI4C&amp;amp;printsec=frontcover&amp;amp;source=gbs_v2_summary_r&amp;amp;cad=0#v=onepage&amp;amp;q=&amp;amp;f=false The designer&amp;#039;s guide to VHDL]&lt;br /&gt;
&lt;br /&gt;
== Saites ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com Xilinx kompānijas (FPGA ražotājs) portāls]&lt;br /&gt;
&lt;br /&gt;
==== Digital design textbooks @ Digilent Inc.====&lt;br /&gt;
&lt;br /&gt;
* [http://www.digilentinc.com/Data/Textbooks/Intro_to_Digital_Design-Digilent-Verilog_Online.pdf Introduction to Digital Design - Verilog Edition] PDF 5.81MB&lt;br /&gt;
* [http://www.digilentinc.com/Data/Textbooks/Intro_Digital_Design-Digilent-VHDL_Online.pdf Introduction to Digital Design - VHDL Edition] PDF 6.68MB&lt;br /&gt;
* Real Digital - A hands-on approach to digital design&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M1/RealDigital_Module_1.pdf Module 1: Introduction to Electronic Circuits] PDF 465.54KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M2/RealDigital_Module_2.pdf Module 2: Introduction to Digilent&amp;#039;s Digital Design Circuit Boards] PDF 65.94KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M3/RealDigital_Module_3.pdf Module 3: Circuit Structure with an Introduction to CAD Tools] PDF 247.60KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M4/RealDigital_Module_4.pdf Module 4: Logic Minimization] PDF 353.07KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M5/RealDigital_Module_5.pdf Module 5: Introduction to VHDL] PDF 197.37KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M6/RealDigital_Module_6.pdf Module 6: Combinational Circuit Blocks] PDF 244.46KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M7/RealDigital_Module_7.pdf Module 7: Combinational Arithmetic Circuits] PDF 361.00KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M8/RealDigital_Module_8.pdf Module 8: Signal Propagation Delays] PDF 126.77KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M9/RealDigital_Module_9.pdf Module 9: Basic Memory Circuits] PDF 232.41KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M10/RealDigital_Module_10.pdf Module 10: The Structural Design of Sequential Circuits] PDF 245.58KB&lt;br /&gt;
&lt;br /&gt;
==== Xilinx ISE WebPACK 12.2 ====&lt;br /&gt;
&lt;br /&gt;
* [https://secure.xilinx.com/webreg/register.do?group=dlc&amp;amp;htmlfile=&amp;amp;emailFile=&amp;amp;cancellink=&amp;amp;eFrom=&amp;amp;eSubject=&amp;amp;version=12.2&amp;amp;akdm=1&amp;amp;filename=Xilinx_ISE_DS_Lin_12.2_M.63c.1.1.tar Installer for Linux] TAR/GZ 3.02GB (nepieciešams reģistrēties www.xilinx.com)&lt;br /&gt;
&lt;br /&gt;
* [https://secure.xilinx.com/webreg/register.do?group=dlc&amp;amp;htmlfile=&amp;amp;emailFile=&amp;amp;cancellink=&amp;amp;eFrom=&amp;amp;eSubject=&amp;amp;version=12.2&amp;amp;akdm=1&amp;amp;filename=Xilinx_ISE_DS_Win_12.2_M.63c.1.1.tar Installer for Windows] TAR/GZ 2.96GB (nepieciešams reģistrēties www.xilinx.com)&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/irn.pdf ISE Design Suite 12: Installation, Licensing, and Release Notes] PDF 1.44MB&lt;br /&gt;
&lt;br /&gt;
* [http://ubuntuforums.org/showthread.php?t=1547435 Xilinx ISE WebPACK 12.2 on Ubuntu 10.04 LTS]&lt;br /&gt;
&lt;br /&gt;
* [http://rmdir.de/~michael/xilinx/ Xilinx JTAG tools on Linux without proprietary kernel modules]&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/ise_tutorial_ug695.pdf ISE In-Depth Tutorial] PDF 5.04MB&lt;br /&gt;
&lt;br /&gt;
* [https://xilinx.webex.com/ec0605l/eventcenter/recording/recordAction.do?theAction=poprecord&amp;amp;actname=%2Feventcenter%2Fframe%2Fg.do&amp;amp;apiname=lsr.php&amp;amp;renewticket=0&amp;amp;renewticket=0&amp;amp;actappname=ec0605l&amp;amp;entappname=url0107l&amp;amp;needFilter=false&amp;amp;&amp;amp;isurlact=true&amp;amp;entactname=%2FnbrRecordingURL.do&amp;amp;rID=31975327&amp;amp;rKey=B2CB97CBBB0026E3&amp;amp;recordID=31975327&amp;amp;rnd=7154034615&amp;amp;siteurl=xilinx&amp;amp;SP=EC&amp;amp;AT=pb&amp;amp;format=short ISE Design Suite: Logic Edition – A Quick Tour] WMV 47.50MB&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/plugin_ism.pdf ISim User Guide] PDF 1.96MB&lt;br /&gt;
&lt;br /&gt;
* [https://xilinx.webex.com/ec0605l/eventcenter/recording/recordAction.do;jsessionid=PHcmMMRfyPT41QMhMNm1ryhh2bK1LyX1bM8bnkS9Qp7qgTTCG2S9!1328041475?theAction=poprecord&amp;amp;actname=%2Feventcenter%2Fframe%2Fg.do&amp;amp;apiname=lsr.php&amp;amp;renewticket=0&amp;amp;renewticket=0&amp;amp;actappname=ec0605l&amp;amp;entappname=url0107l&amp;amp;needFilter=false&amp;amp;&amp;amp;isurlact=true&amp;amp;entactname=%2FnbrRecordingURL.do&amp;amp;rID=41800312&amp;amp;rKey=82ac13e94441c96c&amp;amp;recordID=41800312&amp;amp;rnd=5574793851&amp;amp;siteurl=xilinx&amp;amp;SP=EC&amp;amp;AT=pb&amp;amp;format=short How to Use the ISE Simulator (ISim)] WMV 40.90MB&lt;br /&gt;
&lt;br /&gt;
==== Xilinx Spartan-3E ====&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/boards_and_kits/ug230.pdf Xilinx Spartan-3E FPGA Starter Kit Board User Guide] PDF 7.34MB&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/spartan3e_scm.pdf Spartan-3E Libraries Guide for Schematic Designs] PDF 9.19MB&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/spartan3e_hdl.pdf Spartan-3E Libraries Guide for HDL Designs] PDF 3.94MB&lt;br /&gt;
&lt;br /&gt;
==== Video applications using FPGA ====&lt;br /&gt;
&lt;br /&gt;
* [http://www.stevechamberlin.com/cpu/2009/06/21/fpga-pong/ FPGA Pong] by Steve Chamberlin&lt;br /&gt;
* [http://www.fpga4fun.com/PongGame.html Pong Game] by Jean P. Nicolle&lt;br /&gt;
&lt;br /&gt;
==== HDL tutorials ====&lt;br /&gt;
&lt;br /&gt;
* [http://www.eecs.harvard.edu/cs141/resources/verilog-tutorial.pdf Verilog Tutorial I (10 pages)] PDF 69.58KB&lt;br /&gt;
* [http://www.ece.umd.edu/class/enee359a.S2008/verilog_tutorial.pdf Verilog Tutorial II (227 pages)] PDF 876.25KB&lt;br /&gt;
* [http://www.gmvhdl.com/VHDL.html VHDL Tutorial I (15 pages)]&lt;br /&gt;
* [http://lslwww.epfl.ch/pages/teaching/cours_lsl/sl_info/vhdl-tutorial.pdf VHDL Tutorial II (84 pages)] PDF 391.95KB&lt;br /&gt;
&lt;br /&gt;
==== Atsauksmes par kursu ====&lt;br /&gt;
* DIP 2012-1-m: [http://bit.ly/MVbhuZ] [http://bit.ly/Lvsur2] [http://bit.ly/MX4Upj]&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
==== Dažādi ====&lt;br /&gt;
* [http://www.cpushack.com/ CPU Shack]&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b12&amp;diff=4132</id>
		<title>LU-DIP-b12</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b12&amp;diff=4132"/>
		<updated>2012-12-20T10:40:22Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 27.08.2012 &lt;br /&gt;
- 02.09.2012&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 07.09.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 14.09.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 21.09.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 28.09.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 05.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.02.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 12.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 19.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 26.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L08-DLXProcessorAndInstructions.1.01.pdf DLX procesors un instrukcijas.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 02.11.2012&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 09.11.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 16.11.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP3]]&lt;br /&gt;
|-&lt;br /&gt;
| 23.11.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
|-&lt;br /&gt;
| 30.11.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| 07.12.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| 14.12.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| 21.12.2012 &lt;br /&gt;
- 01.01.2013&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2013, &lt;br /&gt;
xx.01.2013&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2013&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2013&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
* [[DIPb10:KP3 | KP3]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Literatūra ==&lt;br /&gt;
&lt;br /&gt;
* [http://books.google.lv/books?id=1lD9LZRcIZ8C&amp;amp;printsec=frontcover&amp;amp;source=gbs_navlinks_s#v=onepage&amp;amp;q=&amp;amp;f=false Computer organization and design: the hardware/software interface]&lt;br /&gt;
** [http://owlhouse.csie.nctu.edu.tw/old/CO2004/ch1-4_old.ppt Computer Organization &amp;amp; Design The Hardware/Software Interface, 2nd Edition] PPT 5.89MB (lekciju slaidi no National Chiao Tung University)&lt;br /&gt;
** [http://owlhouse.csie.nctu.edu.tw/old/CO2004/CO2004_lecture_notes.ppt Computer Organization &amp;amp; Design The Hardware/Software Interface, 3nd Edition] PPT 1.86MB (lekciju slaidi no National Chiao Tung University)&lt;br /&gt;
&lt;br /&gt;
* [http://books.google.lv/books?id=57UIPoLt3tkC&amp;amp;printsec=frontcover&amp;amp;source=gbs_v2_summary_r&amp;amp;cad=0#v=onepage&amp;amp;q=&amp;amp;f=false Computer architecture: a quantitative approach]&lt;br /&gt;
&lt;br /&gt;
* [http://books.google.lv/books?id=3aN89DhGwI4C&amp;amp;printsec=frontcover&amp;amp;source=gbs_v2_summary_r&amp;amp;cad=0#v=onepage&amp;amp;q=&amp;amp;f=false The designer&amp;#039;s guide to VHDL]&lt;br /&gt;
&lt;br /&gt;
== Saites ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com Xilinx kompānijas (FPGA ražotājs) portāls]&lt;br /&gt;
&lt;br /&gt;
==== Digital design textbooks @ Digilent Inc.====&lt;br /&gt;
&lt;br /&gt;
* [http://www.digilentinc.com/Data/Textbooks/Intro_to_Digital_Design-Digilent-Verilog_Online.pdf Introduction to Digital Design - Verilog Edition] PDF 5.81MB&lt;br /&gt;
* [http://www.digilentinc.com/Data/Textbooks/Intro_Digital_Design-Digilent-VHDL_Online.pdf Introduction to Digital Design - VHDL Edition] PDF 6.68MB&lt;br /&gt;
* Real Digital - A hands-on approach to digital design&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M1/RealDigital_Module_1.pdf Module 1: Introduction to Electronic Circuits] PDF 465.54KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M2/RealDigital_Module_2.pdf Module 2: Introduction to Digilent&amp;#039;s Digital Design Circuit Boards] PDF 65.94KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M3/RealDigital_Module_3.pdf Module 3: Circuit Structure with an Introduction to CAD Tools] PDF 247.60KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M4/RealDigital_Module_4.pdf Module 4: Logic Minimization] PDF 353.07KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M5/RealDigital_Module_5.pdf Module 5: Introduction to VHDL] PDF 197.37KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M6/RealDigital_Module_6.pdf Module 6: Combinational Circuit Blocks] PDF 244.46KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M7/RealDigital_Module_7.pdf Module 7: Combinational Arithmetic Circuits] PDF 361.00KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M8/RealDigital_Module_8.pdf Module 8: Signal Propagation Delays] PDF 126.77KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M9/RealDigital_Module_9.pdf Module 9: Basic Memory Circuits] PDF 232.41KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M10/RealDigital_Module_10.pdf Module 10: The Structural Design of Sequential Circuits] PDF 245.58KB&lt;br /&gt;
&lt;br /&gt;
==== Xilinx ISE WebPACK 12.2 ====&lt;br /&gt;
&lt;br /&gt;
* [https://secure.xilinx.com/webreg/register.do?group=dlc&amp;amp;htmlfile=&amp;amp;emailFile=&amp;amp;cancellink=&amp;amp;eFrom=&amp;amp;eSubject=&amp;amp;version=12.2&amp;amp;akdm=1&amp;amp;filename=Xilinx_ISE_DS_Lin_12.2_M.63c.1.1.tar Installer for Linux] TAR/GZ 3.02GB (nepieciešams reģistrēties www.xilinx.com)&lt;br /&gt;
&lt;br /&gt;
* [https://secure.xilinx.com/webreg/register.do?group=dlc&amp;amp;htmlfile=&amp;amp;emailFile=&amp;amp;cancellink=&amp;amp;eFrom=&amp;amp;eSubject=&amp;amp;version=12.2&amp;amp;akdm=1&amp;amp;filename=Xilinx_ISE_DS_Win_12.2_M.63c.1.1.tar Installer for Windows] TAR/GZ 2.96GB (nepieciešams reģistrēties www.xilinx.com)&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/irn.pdf ISE Design Suite 12: Installation, Licensing, and Release Notes] PDF 1.44MB&lt;br /&gt;
&lt;br /&gt;
* [http://ubuntuforums.org/showthread.php?t=1547435 Xilinx ISE WebPACK 12.2 on Ubuntu 10.04 LTS]&lt;br /&gt;
&lt;br /&gt;
* [http://rmdir.de/~michael/xilinx/ Xilinx JTAG tools on Linux without proprietary kernel modules]&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/ise_tutorial_ug695.pdf ISE In-Depth Tutorial] PDF 5.04MB&lt;br /&gt;
&lt;br /&gt;
* [https://xilinx.webex.com/ec0605l/eventcenter/recording/recordAction.do?theAction=poprecord&amp;amp;actname=%2Feventcenter%2Fframe%2Fg.do&amp;amp;apiname=lsr.php&amp;amp;renewticket=0&amp;amp;renewticket=0&amp;amp;actappname=ec0605l&amp;amp;entappname=url0107l&amp;amp;needFilter=false&amp;amp;&amp;amp;isurlact=true&amp;amp;entactname=%2FnbrRecordingURL.do&amp;amp;rID=31975327&amp;amp;rKey=B2CB97CBBB0026E3&amp;amp;recordID=31975327&amp;amp;rnd=7154034615&amp;amp;siteurl=xilinx&amp;amp;SP=EC&amp;amp;AT=pb&amp;amp;format=short ISE Design Suite: Logic Edition – A Quick Tour] WMV 47.50MB&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/plugin_ism.pdf ISim User Guide] PDF 1.96MB&lt;br /&gt;
&lt;br /&gt;
* [https://xilinx.webex.com/ec0605l/eventcenter/recording/recordAction.do;jsessionid=PHcmMMRfyPT41QMhMNm1ryhh2bK1LyX1bM8bnkS9Qp7qgTTCG2S9!1328041475?theAction=poprecord&amp;amp;actname=%2Feventcenter%2Fframe%2Fg.do&amp;amp;apiname=lsr.php&amp;amp;renewticket=0&amp;amp;renewticket=0&amp;amp;actappname=ec0605l&amp;amp;entappname=url0107l&amp;amp;needFilter=false&amp;amp;&amp;amp;isurlact=true&amp;amp;entactname=%2FnbrRecordingURL.do&amp;amp;rID=41800312&amp;amp;rKey=82ac13e94441c96c&amp;amp;recordID=41800312&amp;amp;rnd=5574793851&amp;amp;siteurl=xilinx&amp;amp;SP=EC&amp;amp;AT=pb&amp;amp;format=short How to Use the ISE Simulator (ISim)] WMV 40.90MB&lt;br /&gt;
&lt;br /&gt;
==== Xilinx Spartan-3E ====&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/boards_and_kits/ug230.pdf Xilinx Spartan-3E FPGA Starter Kit Board User Guide] PDF 7.34MB&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/spartan3e_scm.pdf Spartan-3E Libraries Guide for Schematic Designs] PDF 9.19MB&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/spartan3e_hdl.pdf Spartan-3E Libraries Guide for HDL Designs] PDF 3.94MB&lt;br /&gt;
&lt;br /&gt;
==== Video applications using FPGA ====&lt;br /&gt;
&lt;br /&gt;
* [http://www.stevechamberlin.com/cpu/2009/06/21/fpga-pong/ FPGA Pong] by Steve Chamberlin&lt;br /&gt;
* [http://www.fpga4fun.com/PongGame.html Pong Game] by Jean P. Nicolle&lt;br /&gt;
&lt;br /&gt;
==== HDL tutorials ====&lt;br /&gt;
&lt;br /&gt;
* [http://www.eecs.harvard.edu/cs141/resources/verilog-tutorial.pdf Verilog Tutorial I (10 pages)] PDF 69.58KB&lt;br /&gt;
* [http://www.ece.umd.edu/class/enee359a.S2008/verilog_tutorial.pdf Verilog Tutorial II (227 pages)] PDF 876.25KB&lt;br /&gt;
* [http://www.gmvhdl.com/VHDL.html VHDL Tutorial I (15 pages)]&lt;br /&gt;
* [http://lslwww.epfl.ch/pages/teaching/cours_lsl/sl_info/vhdl-tutorial.pdf VHDL Tutorial II (84 pages)] PDF 391.95KB&lt;br /&gt;
&lt;br /&gt;
==== Atsauksmes par kursu ====&lt;br /&gt;
* DIP 2012-1-m: [http://bit.ly/MVbhuZ] [http://bit.ly/Lvsur2] [http://bit.ly/MX4Upj]&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
==== Dažādi ====&lt;br /&gt;
* [http://www.cpushack.com/ CPU Shack]&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b12&amp;diff=4064</id>
		<title>LU-DIP-b12</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b12&amp;diff=4064"/>
		<updated>2012-11-15T14:00:51Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 27.08.2012 &lt;br /&gt;
- 02.09.2012&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 07.09.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 14.09.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 21.09.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 28.09.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 05.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.02.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 12.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 19.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 26.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L08-DLXProcessorAndInstructions.1.01.pdf DLX procesors un instrukcijas.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| 02.11.2012&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 09.11.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.02.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| 16.11.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP3]]&lt;br /&gt;
|-&lt;br /&gt;
| xx.11.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| 24.12.2012 &lt;br /&gt;
- 01.01.2013&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2013, &lt;br /&gt;
xx.01.2013&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2013&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2013&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
* [[DIPb10:KP3 | KP3]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Literatūra ==&lt;br /&gt;
&lt;br /&gt;
* [http://books.google.lv/books?id=1lD9LZRcIZ8C&amp;amp;printsec=frontcover&amp;amp;source=gbs_navlinks_s#v=onepage&amp;amp;q=&amp;amp;f=false Computer organization and design: the hardware/software interface]&lt;br /&gt;
** [http://owlhouse.csie.nctu.edu.tw/old/CO2004/ch1-4_old.ppt Computer Organization &amp;amp; Design The Hardware/Software Interface, 2nd Edition] PPT 5.89MB (lekciju slaidi no National Chiao Tung University)&lt;br /&gt;
** [http://owlhouse.csie.nctu.edu.tw/old/CO2004/CO2004_lecture_notes.ppt Computer Organization &amp;amp; Design The Hardware/Software Interface, 3nd Edition] PPT 1.86MB (lekciju slaidi no National Chiao Tung University)&lt;br /&gt;
&lt;br /&gt;
* [http://books.google.lv/books?id=57UIPoLt3tkC&amp;amp;printsec=frontcover&amp;amp;source=gbs_v2_summary_r&amp;amp;cad=0#v=onepage&amp;amp;q=&amp;amp;f=false Computer architecture: a quantitative approach]&lt;br /&gt;
&lt;br /&gt;
* [http://books.google.lv/books?id=3aN89DhGwI4C&amp;amp;printsec=frontcover&amp;amp;source=gbs_v2_summary_r&amp;amp;cad=0#v=onepage&amp;amp;q=&amp;amp;f=false The designer&amp;#039;s guide to VHDL]&lt;br /&gt;
&lt;br /&gt;
== Saites ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com Xilinx kompānijas (FPGA ražotājs) portāls]&lt;br /&gt;
&lt;br /&gt;
==== Digital design textbooks @ Digilent Inc.====&lt;br /&gt;
&lt;br /&gt;
* [http://www.digilentinc.com/Data/Textbooks/Intro_to_Digital_Design-Digilent-Verilog_Online.pdf Introduction to Digital Design - Verilog Edition] PDF 5.81MB&lt;br /&gt;
* [http://www.digilentinc.com/Data/Textbooks/Intro_Digital_Design-Digilent-VHDL_Online.pdf Introduction to Digital Design - VHDL Edition] PDF 6.68MB&lt;br /&gt;
* Real Digital - A hands-on approach to digital design&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M1/RealDigital_Module_1.pdf Module 1: Introduction to Electronic Circuits] PDF 465.54KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M2/RealDigital_Module_2.pdf Module 2: Introduction to Digilent&amp;#039;s Digital Design Circuit Boards] PDF 65.94KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M3/RealDigital_Module_3.pdf Module 3: Circuit Structure with an Introduction to CAD Tools] PDF 247.60KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M4/RealDigital_Module_4.pdf Module 4: Logic Minimization] PDF 353.07KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M5/RealDigital_Module_5.pdf Module 5: Introduction to VHDL] PDF 197.37KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M6/RealDigital_Module_6.pdf Module 6: Combinational Circuit Blocks] PDF 244.46KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M7/RealDigital_Module_7.pdf Module 7: Combinational Arithmetic Circuits] PDF 361.00KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M8/RealDigital_Module_8.pdf Module 8: Signal Propagation Delays] PDF 126.77KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M9/RealDigital_Module_9.pdf Module 9: Basic Memory Circuits] PDF 232.41KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M10/RealDigital_Module_10.pdf Module 10: The Structural Design of Sequential Circuits] PDF 245.58KB&lt;br /&gt;
&lt;br /&gt;
==== Xilinx ISE WebPACK 12.2 ====&lt;br /&gt;
&lt;br /&gt;
* [https://secure.xilinx.com/webreg/register.do?group=dlc&amp;amp;htmlfile=&amp;amp;emailFile=&amp;amp;cancellink=&amp;amp;eFrom=&amp;amp;eSubject=&amp;amp;version=12.2&amp;amp;akdm=1&amp;amp;filename=Xilinx_ISE_DS_Lin_12.2_M.63c.1.1.tar Installer for Linux] TAR/GZ 3.02GB (nepieciešams reģistrēties www.xilinx.com)&lt;br /&gt;
&lt;br /&gt;
* [https://secure.xilinx.com/webreg/register.do?group=dlc&amp;amp;htmlfile=&amp;amp;emailFile=&amp;amp;cancellink=&amp;amp;eFrom=&amp;amp;eSubject=&amp;amp;version=12.2&amp;amp;akdm=1&amp;amp;filename=Xilinx_ISE_DS_Win_12.2_M.63c.1.1.tar Installer for Windows] TAR/GZ 2.96GB (nepieciešams reģistrēties www.xilinx.com)&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/irn.pdf ISE Design Suite 12: Installation, Licensing, and Release Notes] PDF 1.44MB&lt;br /&gt;
&lt;br /&gt;
* [http://ubuntuforums.org/showthread.php?t=1547435 Xilinx ISE WebPACK 12.2 on Ubuntu 10.04 LTS]&lt;br /&gt;
&lt;br /&gt;
* [http://rmdir.de/~michael/xilinx/ Xilinx JTAG tools on Linux without proprietary kernel modules]&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/ise_tutorial_ug695.pdf ISE In-Depth Tutorial] PDF 5.04MB&lt;br /&gt;
&lt;br /&gt;
* [https://xilinx.webex.com/ec0605l/eventcenter/recording/recordAction.do?theAction=poprecord&amp;amp;actname=%2Feventcenter%2Fframe%2Fg.do&amp;amp;apiname=lsr.php&amp;amp;renewticket=0&amp;amp;renewticket=0&amp;amp;actappname=ec0605l&amp;amp;entappname=url0107l&amp;amp;needFilter=false&amp;amp;&amp;amp;isurlact=true&amp;amp;entactname=%2FnbrRecordingURL.do&amp;amp;rID=31975327&amp;amp;rKey=B2CB97CBBB0026E3&amp;amp;recordID=31975327&amp;amp;rnd=7154034615&amp;amp;siteurl=xilinx&amp;amp;SP=EC&amp;amp;AT=pb&amp;amp;format=short ISE Design Suite: Logic Edition – A Quick Tour] WMV 47.50MB&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/plugin_ism.pdf ISim User Guide] PDF 1.96MB&lt;br /&gt;
&lt;br /&gt;
* [https://xilinx.webex.com/ec0605l/eventcenter/recording/recordAction.do;jsessionid=PHcmMMRfyPT41QMhMNm1ryhh2bK1LyX1bM8bnkS9Qp7qgTTCG2S9!1328041475?theAction=poprecord&amp;amp;actname=%2Feventcenter%2Fframe%2Fg.do&amp;amp;apiname=lsr.php&amp;amp;renewticket=0&amp;amp;renewticket=0&amp;amp;actappname=ec0605l&amp;amp;entappname=url0107l&amp;amp;needFilter=false&amp;amp;&amp;amp;isurlact=true&amp;amp;entactname=%2FnbrRecordingURL.do&amp;amp;rID=41800312&amp;amp;rKey=82ac13e94441c96c&amp;amp;recordID=41800312&amp;amp;rnd=5574793851&amp;amp;siteurl=xilinx&amp;amp;SP=EC&amp;amp;AT=pb&amp;amp;format=short How to Use the ISE Simulator (ISim)] WMV 40.90MB&lt;br /&gt;
&lt;br /&gt;
==== Xilinx Spartan-3E ====&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/boards_and_kits/ug230.pdf Xilinx Spartan-3E FPGA Starter Kit Board User Guide] PDF 7.34MB&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/spartan3e_scm.pdf Spartan-3E Libraries Guide for Schematic Designs] PDF 9.19MB&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/spartan3e_hdl.pdf Spartan-3E Libraries Guide for HDL Designs] PDF 3.94MB&lt;br /&gt;
&lt;br /&gt;
==== Video applications using FPGA ====&lt;br /&gt;
&lt;br /&gt;
* [http://www.stevechamberlin.com/cpu/2009/06/21/fpga-pong/ FPGA Pong] by Steve Chamberlin&lt;br /&gt;
* [http://www.fpga4fun.com/PongGame.html Pong Game] by Jean P. Nicolle&lt;br /&gt;
&lt;br /&gt;
==== HDL tutorials ====&lt;br /&gt;
&lt;br /&gt;
* [http://www.eecs.harvard.edu/cs141/resources/verilog-tutorial.pdf Verilog Tutorial I (10 pages)] PDF 69.58KB&lt;br /&gt;
* [http://www.ece.umd.edu/class/enee359a.S2008/verilog_tutorial.pdf Verilog Tutorial II (227 pages)] PDF 876.25KB&lt;br /&gt;
* [http://www.gmvhdl.com/VHDL.html VHDL Tutorial I (15 pages)]&lt;br /&gt;
* [http://lslwww.epfl.ch/pages/teaching/cours_lsl/sl_info/vhdl-tutorial.pdf VHDL Tutorial II (84 pages)] PDF 391.95KB&lt;br /&gt;
&lt;br /&gt;
==== Atsauksmes par kursu ====&lt;br /&gt;
* DIP 2012-1-m: [http://bit.ly/MVbhuZ] [http://bit.ly/Lvsur2] [http://bit.ly/MX4Upj]&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
==== Dažādi ====&lt;br /&gt;
* [http://www.cpushack.com/ CPU Shack]&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:KP1&amp;diff=3934</id>
		<title>DIPb10:KP1</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:KP1&amp;diff=3934"/>
		<updated>2012-10-11T15:36:54Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;=== Vientakts procesora elementu projektēšana ===&lt;br /&gt;
* Kursa projektu studenti veic individuāli.&lt;br /&gt;
* Kursa projekta izpilde var tikt veikta gan praktisko darbu laikā, izmantojot LU datorresursus, gan citā laikā, izmantojot citus studentiem pieejamos datorresursus.&lt;br /&gt;
* Kursa projekts ir sadalīts 2 secīgos posmos.&lt;br /&gt;
* Uzsākt nākošo posmu students var tikai tad, kad ir veiksmīgi nokārtojis ieskaiti par iepriekšējā posmā paveikto.&lt;br /&gt;
* Lai nokārtotu ieskaiti, ir jābūt izpildītiem sekojošiem nosacījumiem:&lt;br /&gt;
** līdz kārtējās lekcijas sākumam uz e-pasta adresi rinalds punkts ruskuls pie gmail punkts com ir iesūtīts saarhivēts ISE projekts;&lt;br /&gt;
** kārtējo praktisko darbu laikā ir atrādīts ISE projekts, kurā ar testpiemēriem tiek prezentēta izveidotā funkcionalitāte;&lt;br /&gt;
&lt;br /&gt;
=== 1.posms ===&lt;br /&gt;
* Aritmētiski loģiskais bloks (ALU) - [http://books.google.lv/books?id=1lD9LZRcIZ8C 5.4, B.5, B.6]&lt;br /&gt;
** ieejas signāli A(31:0), B(31:0), OPCODE(3:0)&lt;br /&gt;
** izejas signāli RESULT(31:0), ZERO, OVERFLOW, CarryOut&lt;br /&gt;
** operācijas AND(0000), OR(0001), ADD(0010), SUB(0110), SLT(0111), NOR(1100)&lt;br /&gt;
* Iesūtīšanas termiņš 19.10.2012 08:30&lt;br /&gt;
* Atrādīšanas termiņš 19.10.2012 12:10&lt;br /&gt;
&lt;br /&gt;
=== 2.posms ===&lt;br /&gt;
* Reģistru fails (Register file) - [http://books.google.lv/books?id=1lD9LZRcIZ8C 5.3, B.8]&lt;br /&gt;
** ieejas signāli ReadRegister1(4:0), ReadRegister2(4:0), WriteRegister(4:0), WriteData(31:0), RegWrite&lt;br /&gt;
** izejas signāli ReadData1(31:0), ReadData2(31:0)&lt;br /&gt;
* Iesūtīšanas termiņš 26.10.2012 08:30&lt;br /&gt;
* Atrādīšanas termiņš 26.10.2012 12:10&lt;br /&gt;
&lt;br /&gt;
&amp;#039;&amp;#039;&amp;#039;Uzmanību! Šī kursa projekta izpilde var būtiski atvieglot (bet neizpilde - ievērojami sarežģīt) vidussemestra kontroldarba praktiskās daļas uzdevuma izpildi.&amp;#039;&amp;#039;&amp;#039;&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b12&amp;diff=3933</id>
		<title>LU-DIP-b12</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b12&amp;diff=3933"/>
		<updated>2012-10-11T15:34:34Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 27.08.2012 &lt;br /&gt;
- 02.09.2012&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 07.09.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 14.09.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 21.09.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 28.09.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 05.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.02.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 12.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 19.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 26.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L08-DLXProcessorAndInstructions.1.01.pdf DLX procesors un instrukcijas.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| xx.11.2012&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| xx.11.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.01.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| &lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP3]]&lt;br /&gt;
|-&lt;br /&gt;
| xx.11.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| 24.12.2012 &lt;br /&gt;
- 01.01.2013&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2013, &lt;br /&gt;
xx.01.2013&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2013&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2013&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
* [[DIPb10:KP3 | KP3]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Literatūra ==&lt;br /&gt;
&lt;br /&gt;
* [http://books.google.lv/books?id=1lD9LZRcIZ8C&amp;amp;printsec=frontcover&amp;amp;source=gbs_navlinks_s#v=onepage&amp;amp;q=&amp;amp;f=false Computer organization and design: the hardware/software interface]&lt;br /&gt;
** [http://owlhouse.csie.nctu.edu.tw/old/CO2004/ch1-4_old.ppt Computer Organization &amp;amp; Design The Hardware/Software Interface, 2nd Edition] PPT 5.89MB (lekciju slaidi no National Chiao Tung University)&lt;br /&gt;
** [http://owlhouse.csie.nctu.edu.tw/old/CO2004/CO2004_lecture_notes.ppt Computer Organization &amp;amp; Design The Hardware/Software Interface, 3nd Edition] PPT 1.86MB (lekciju slaidi no National Chiao Tung University)&lt;br /&gt;
&lt;br /&gt;
* [http://books.google.lv/books?id=57UIPoLt3tkC&amp;amp;printsec=frontcover&amp;amp;source=gbs_v2_summary_r&amp;amp;cad=0#v=onepage&amp;amp;q=&amp;amp;f=false Computer architecture: a quantitative approach]&lt;br /&gt;
&lt;br /&gt;
* [http://books.google.lv/books?id=3aN89DhGwI4C&amp;amp;printsec=frontcover&amp;amp;source=gbs_v2_summary_r&amp;amp;cad=0#v=onepage&amp;amp;q=&amp;amp;f=false The designer&amp;#039;s guide to VHDL]&lt;br /&gt;
&lt;br /&gt;
== Saites ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com Xilinx kompānijas (FPGA ražotājs) portāls]&lt;br /&gt;
&lt;br /&gt;
==== Digital design textbooks @ Digilent Inc.====&lt;br /&gt;
&lt;br /&gt;
* [http://www.digilentinc.com/Data/Textbooks/Intro_to_Digital_Design-Digilent-Verilog_Online.pdf Introduction to Digital Design - Verilog Edition] PDF 5.81MB&lt;br /&gt;
* [http://www.digilentinc.com/Data/Textbooks/Intro_Digital_Design-Digilent-VHDL_Online.pdf Introduction to Digital Design - VHDL Edition] PDF 6.68MB&lt;br /&gt;
* Real Digital - A hands-on approach to digital design&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M1/RealDigital_Module_1.pdf Module 1: Introduction to Electronic Circuits] PDF 465.54KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M2/RealDigital_Module_2.pdf Module 2: Introduction to Digilent&amp;#039;s Digital Design Circuit Boards] PDF 65.94KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M3/RealDigital_Module_3.pdf Module 3: Circuit Structure with an Introduction to CAD Tools] PDF 247.60KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M4/RealDigital_Module_4.pdf Module 4: Logic Minimization] PDF 353.07KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M5/RealDigital_Module_5.pdf Module 5: Introduction to VHDL] PDF 197.37KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M6/RealDigital_Module_6.pdf Module 6: Combinational Circuit Blocks] PDF 244.46KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M7/RealDigital_Module_7.pdf Module 7: Combinational Arithmetic Circuits] PDF 361.00KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M8/RealDigital_Module_8.pdf Module 8: Signal Propagation Delays] PDF 126.77KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M9/RealDigital_Module_9.pdf Module 9: Basic Memory Circuits] PDF 232.41KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M10/RealDigital_Module_10.pdf Module 10: The Structural Design of Sequential Circuits] PDF 245.58KB&lt;br /&gt;
&lt;br /&gt;
==== Xilinx ISE WebPACK 12.2 ====&lt;br /&gt;
&lt;br /&gt;
* [https://secure.xilinx.com/webreg/register.do?group=dlc&amp;amp;htmlfile=&amp;amp;emailFile=&amp;amp;cancellink=&amp;amp;eFrom=&amp;amp;eSubject=&amp;amp;version=12.2&amp;amp;akdm=1&amp;amp;filename=Xilinx_ISE_DS_Lin_12.2_M.63c.1.1.tar Installer for Linux] TAR/GZ 3.02GB (nepieciešams reģistrēties www.xilinx.com)&lt;br /&gt;
&lt;br /&gt;
* [https://secure.xilinx.com/webreg/register.do?group=dlc&amp;amp;htmlfile=&amp;amp;emailFile=&amp;amp;cancellink=&amp;amp;eFrom=&amp;amp;eSubject=&amp;amp;version=12.2&amp;amp;akdm=1&amp;amp;filename=Xilinx_ISE_DS_Win_12.2_M.63c.1.1.tar Installer for Windows] TAR/GZ 2.96GB (nepieciešams reģistrēties www.xilinx.com)&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/irn.pdf ISE Design Suite 12: Installation, Licensing, and Release Notes] PDF 1.44MB&lt;br /&gt;
&lt;br /&gt;
* [http://ubuntuforums.org/showthread.php?t=1547435 Xilinx ISE WebPACK 12.2 on Ubuntu 10.04 LTS]&lt;br /&gt;
&lt;br /&gt;
* [http://rmdir.de/~michael/xilinx/ Xilinx JTAG tools on Linux without proprietary kernel modules]&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/ise_tutorial_ug695.pdf ISE In-Depth Tutorial] PDF 5.04MB&lt;br /&gt;
&lt;br /&gt;
* [https://xilinx.webex.com/ec0605l/eventcenter/recording/recordAction.do?theAction=poprecord&amp;amp;actname=%2Feventcenter%2Fframe%2Fg.do&amp;amp;apiname=lsr.php&amp;amp;renewticket=0&amp;amp;renewticket=0&amp;amp;actappname=ec0605l&amp;amp;entappname=url0107l&amp;amp;needFilter=false&amp;amp;&amp;amp;isurlact=true&amp;amp;entactname=%2FnbrRecordingURL.do&amp;amp;rID=31975327&amp;amp;rKey=B2CB97CBBB0026E3&amp;amp;recordID=31975327&amp;amp;rnd=7154034615&amp;amp;siteurl=xilinx&amp;amp;SP=EC&amp;amp;AT=pb&amp;amp;format=short ISE Design Suite: Logic Edition – A Quick Tour] WMV 47.50MB&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/plugin_ism.pdf ISim User Guide] PDF 1.96MB&lt;br /&gt;
&lt;br /&gt;
* [https://xilinx.webex.com/ec0605l/eventcenter/recording/recordAction.do;jsessionid=PHcmMMRfyPT41QMhMNm1ryhh2bK1LyX1bM8bnkS9Qp7qgTTCG2S9!1328041475?theAction=poprecord&amp;amp;actname=%2Feventcenter%2Fframe%2Fg.do&amp;amp;apiname=lsr.php&amp;amp;renewticket=0&amp;amp;renewticket=0&amp;amp;actappname=ec0605l&amp;amp;entappname=url0107l&amp;amp;needFilter=false&amp;amp;&amp;amp;isurlact=true&amp;amp;entactname=%2FnbrRecordingURL.do&amp;amp;rID=41800312&amp;amp;rKey=82ac13e94441c96c&amp;amp;recordID=41800312&amp;amp;rnd=5574793851&amp;amp;siteurl=xilinx&amp;amp;SP=EC&amp;amp;AT=pb&amp;amp;format=short How to Use the ISE Simulator (ISim)] WMV 40.90MB&lt;br /&gt;
&lt;br /&gt;
==== Xilinx Spartan-3E ====&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/boards_and_kits/ug230.pdf Xilinx Spartan-3E FPGA Starter Kit Board User Guide] PDF 7.34MB&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/spartan3e_scm.pdf Spartan-3E Libraries Guide for Schematic Designs] PDF 9.19MB&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/spartan3e_hdl.pdf Spartan-3E Libraries Guide for HDL Designs] PDF 3.94MB&lt;br /&gt;
&lt;br /&gt;
==== Video applications using FPGA ====&lt;br /&gt;
&lt;br /&gt;
* [http://www.stevechamberlin.com/cpu/2009/06/21/fpga-pong/ FPGA Pong] by Steve Chamberlin&lt;br /&gt;
* [http://www.fpga4fun.com/PongGame.html Pong Game] by Jean P. Nicolle&lt;br /&gt;
&lt;br /&gt;
==== HDL tutorials ====&lt;br /&gt;
&lt;br /&gt;
* [http://www.eecs.harvard.edu/cs141/resources/verilog-tutorial.pdf Verilog Tutorial I (10 pages)] PDF 69.58KB&lt;br /&gt;
* [http://www.ece.umd.edu/class/enee359a.S2008/verilog_tutorial.pdf Verilog Tutorial II (227 pages)] PDF 876.25KB&lt;br /&gt;
* [http://www.gmvhdl.com/VHDL.html VHDL Tutorial I (15 pages)]&lt;br /&gt;
* [http://lslwww.epfl.ch/pages/teaching/cours_lsl/sl_info/vhdl-tutorial.pdf VHDL Tutorial II (84 pages)] PDF 391.95KB&lt;br /&gt;
&lt;br /&gt;
==== Atsauksmes par kursu ====&lt;br /&gt;
* DIP 2012-1-m: [http://bit.ly/MVbhuZ] [http://bit.ly/Lvsur2] [http://bit.ly/MX4Upj]&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
==== Dažādi ====&lt;br /&gt;
* [http://www.cpushack.com/ CPU Shack]&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b12&amp;diff=3932</id>
		<title>LU-DIP-b12</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=LU-DIP-b12&amp;diff=3932"/>
		<updated>2012-10-11T15:32:42Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{LUDFKurss|Ievads digitālajā projektēšanā|DIP|DatZ3074|2DAT3255}}&lt;br /&gt;
&lt;br /&gt;
* Pasniedzēji: Rinalds Ruskuls, Leo Seļāvo&lt;br /&gt;
* {{KursiGGroup|lu-dip-b}}&lt;br /&gt;
&lt;br /&gt;
== Darbu iesniegšana un vērtēšana ==&lt;br /&gt;
{{KursiMD|DIP|50%|10%}}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Kalendārs ==&lt;br /&gt;
&lt;br /&gt;
{| border=1 cellspacing=0 cellpadding=4&lt;br /&gt;
|-&lt;br /&gt;
! Nedēļas datumi &lt;br /&gt;
! Kursa saturs&lt;br /&gt;
|-&lt;br /&gt;
| 27.08.2012 &lt;br /&gt;
- 02.09.2012&lt;br /&gt;
| Reģistrācijas nedēļa&lt;br /&gt;
|-&lt;br /&gt;
| 07.09.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L01-Introduction.1.02.pdf Ievadlekcija. Digitālās projektēšanas process.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD1 | PD1]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD1 | MD1]]&lt;br /&gt;
|-&lt;br /&gt;
| 14.09.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L02-Spartan3E.1.01.pdf Digitālo iekārtu izstrādes pamatelementi. Xilinx Spartan 3E.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD2 | PD2]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD2 | MD2]]&lt;br /&gt;
|-&lt;br /&gt;
| 21.09.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L03-Triggers&amp;amp;Clock.1.02.pdf Trigeri. Pulkstenis.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD3 | PD3]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD3 | MD3]]&lt;br /&gt;
|-&lt;br /&gt;
| 28.09.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L04-CPUPartOne.1.02.pdf CPU. DataPath. ALU.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD4 | PD4]].&lt;br /&gt;
&lt;br /&gt;
Mājas darbs [[DIPb10:MD4 | MD4]]&lt;br /&gt;
|-&lt;br /&gt;
| 05.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L05-CPUPartTwo.1.01.pdf CPU. DataPath (turpinājums). Instrukciju izpildes maģistrāle.]&lt;br /&gt;
&lt;br /&gt;
Praktiskais darbs [[DIPb10:PD5 | PD5]].&lt;br /&gt;
&lt;br /&gt;
Kursa projekts [[DIPb10:KP1 | KP1]]&lt;br /&gt;
|-&lt;br /&gt;
| 12.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L06-CPUPartThree.1.02.pdf CPU. DataPath (turpinājums). Zarošanās. Kontrole.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 19.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L07-CPUPartFour.1.02.pdf CPU. DataPath (nobeigums). Ātrāks summators. Reģistru fails.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP1 | KP1]].&lt;br /&gt;
|-&lt;br /&gt;
| 26.10.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L08-DLXProcessorAndInstructions.1.01.pdf DLX procesors un instrukcijas.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP2 | KP2]]&lt;br /&gt;
|-&lt;br /&gt;
| xx.11.2012&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;Vidus semestra kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| xx.11.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L09-HDLVerilog.1.01.pdf Aparatūras apraksta valodas. Verilog.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP2 | KP2]].&lt;br /&gt;
|-&lt;br /&gt;
| &lt;br /&gt;
| [http://selavo.lv/kursi/dip/L10-HDLVHDL.1.02.pdf Aparatūras apraksta valodas. VHDL.]&lt;br /&gt;
Kursa projekts [[DIPb10:KP3 | KP3]]&lt;br /&gt;
|-&lt;br /&gt;
| xx.11.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L11-Memory.1.02.pdf Atmiņa. Fiziskās realizācijas varianti.]&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L12-MulticycleCPU.1.01.pdf Daudztaktu procesors.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://bear.ces.cwru.edu/eecs_318/eecs_318_7.pdf Multicycle CPU] PDF 455.60KB (lekciju slaidi no Case Western Reserve University)&lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L13-MulticycleCPUPartTwo.1.02.pdf Daudztaktu procesors (nobeigums).]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://www.sdsc.edu/~allans/cs141/l11redo.pdf Designing a Pipelined CPU] PDF 116.22KB (lekciju slaidi no San Diego Supercomputer Center)&lt;br /&gt;
|-&lt;br /&gt;
| xx.12.2012&lt;br /&gt;
| [http://selavo.lv/kursi/dip/L14-FPGA.1.01.pdf FPGA.]&lt;br /&gt;
&lt;br /&gt;
Praktiskajos darbos turpinām strādāt pie kursa projekta [[DIPb10:KP3 | KP3]].&lt;br /&gt;
&lt;br /&gt;
[http://www.ppouyan.net/wp-content/uploads/2010/09/fpga.pdf How Does FPGA Work] PDF 1.06MB (lekciju slaidi no Lund University) &lt;br /&gt;
|-&lt;br /&gt;
| 24.12.2012 &lt;br /&gt;
- 01.01.2013&lt;br /&gt;
| Ziemassvētku un Jaungada brīvdienas &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2013, &lt;br /&gt;
xx.01.2013&lt;br /&gt;
| Konsultācijas&lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2013&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx: Gala eksāmena kontroldarbs&amp;#039;&amp;#039;&amp;#039; &lt;br /&gt;
|-&lt;br /&gt;
| xx.01.2013&lt;br /&gt;
| &amp;#039;&amp;#039;&amp;#039;xx:xx:  Projektu prezentācijas - kursa noslēgums&amp;#039;&amp;#039;&amp;#039;&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Praktiskie darbi (PD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:PD1 | PD1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:PD2 | PD2]]&lt;br /&gt;
* [[DIPb10:PD3 | PD3]]&lt;br /&gt;
* [[DIPb10:PD4 | PD4]]&lt;br /&gt;
* [[DIPb10:PD5 | PD5]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Mājas darbi (MD) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:MD1 | MD1]]&lt;br /&gt;
* [[DIPb10:MD2 | MD2]]&lt;br /&gt;
* [[DIPb10:MD3 | MD3]]&lt;br /&gt;
* [[DIPb10:MD4 | MD4]]&lt;br /&gt;
&lt;br /&gt;
== Kursa projekti (KP) ==&lt;br /&gt;
&lt;br /&gt;
* [[DIPb10:KP1 | KP1]]&lt;br /&gt;
&amp;lt;!--&lt;br /&gt;
* [[DIPb10:KP2 | KP2]]&lt;br /&gt;
* [[DIPb10:KP3 | KP3]]&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Literatūra ==&lt;br /&gt;
&lt;br /&gt;
* [http://books.google.lv/books?id=1lD9LZRcIZ8C&amp;amp;printsec=frontcover&amp;amp;source=gbs_navlinks_s#v=onepage&amp;amp;q=&amp;amp;f=false Computer organization and design: the hardware/software interface]&lt;br /&gt;
** [http://owlhouse.csie.nctu.edu.tw/old/CO2004/ch1-4_old.ppt Computer Organization &amp;amp; Design The Hardware/Software Interface, 2nd Edition] PPT 5.89MB (lekciju slaidi no National Chiao Tung University)&lt;br /&gt;
** [http://owlhouse.csie.nctu.edu.tw/old/CO2004/CO2004_lecture_notes.ppt Computer Organization &amp;amp; Design The Hardware/Software Interface, 3nd Edition] PPT 1.86MB (lekciju slaidi no National Chiao Tung University)&lt;br /&gt;
&lt;br /&gt;
* [http://books.google.lv/books?id=57UIPoLt3tkC&amp;amp;printsec=frontcover&amp;amp;source=gbs_v2_summary_r&amp;amp;cad=0#v=onepage&amp;amp;q=&amp;amp;f=false Computer architecture: a quantitative approach]&lt;br /&gt;
&lt;br /&gt;
* [http://books.google.lv/books?id=3aN89DhGwI4C&amp;amp;printsec=frontcover&amp;amp;source=gbs_v2_summary_r&amp;amp;cad=0#v=onepage&amp;amp;q=&amp;amp;f=false The designer&amp;#039;s guide to VHDL]&lt;br /&gt;
&lt;br /&gt;
== Saites ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com Xilinx kompānijas (FPGA ražotājs) portāls]&lt;br /&gt;
&lt;br /&gt;
==== Digital design textbooks @ Digilent Inc.====&lt;br /&gt;
&lt;br /&gt;
* [http://www.digilentinc.com/Data/Textbooks/Intro_to_Digital_Design-Digilent-Verilog_Online.pdf Introduction to Digital Design - Verilog Edition] PDF 5.81MB&lt;br /&gt;
* [http://www.digilentinc.com/Data/Textbooks/Intro_Digital_Design-Digilent-VHDL_Online.pdf Introduction to Digital Design - VHDL Edition] PDF 6.68MB&lt;br /&gt;
* Real Digital - A hands-on approach to digital design&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M1/RealDigital_Module_1.pdf Module 1: Introduction to Electronic Circuits] PDF 465.54KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M2/RealDigital_Module_2.pdf Module 2: Introduction to Digilent&amp;#039;s Digital Design Circuit Boards] PDF 65.94KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M3/RealDigital_Module_3.pdf Module 3: Circuit Structure with an Introduction to CAD Tools] PDF 247.60KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M4/RealDigital_Module_4.pdf Module 4: Logic Minimization] PDF 353.07KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M5/RealDigital_Module_5.pdf Module 5: Introduction to VHDL] PDF 197.37KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M6/RealDigital_Module_6.pdf Module 6: Combinational Circuit Blocks] PDF 244.46KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M7/RealDigital_Module_7.pdf Module 7: Combinational Arithmetic Circuits] PDF 361.00KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M8/RealDigital_Module_8.pdf Module 8: Signal Propagation Delays] PDF 126.77KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M9/RealDigital_Module_9.pdf Module 9: Basic Memory Circuits] PDF 232.41KB&lt;br /&gt;
** [http://www.digilentinc.com/classroom/realdigital/M10/RealDigital_Module_10.pdf Module 10: The Structural Design of Sequential Circuits] PDF 245.58KB&lt;br /&gt;
&lt;br /&gt;
==== Xilinx ISE WebPACK 12.2 ====&lt;br /&gt;
&lt;br /&gt;
* [https://secure.xilinx.com/webreg/register.do?group=dlc&amp;amp;htmlfile=&amp;amp;emailFile=&amp;amp;cancellink=&amp;amp;eFrom=&amp;amp;eSubject=&amp;amp;version=12.2&amp;amp;akdm=1&amp;amp;filename=Xilinx_ISE_DS_Lin_12.2_M.63c.1.1.tar Installer for Linux] TAR/GZ 3.02GB (nepieciešams reģistrēties www.xilinx.com)&lt;br /&gt;
&lt;br /&gt;
* [https://secure.xilinx.com/webreg/register.do?group=dlc&amp;amp;htmlfile=&amp;amp;emailFile=&amp;amp;cancellink=&amp;amp;eFrom=&amp;amp;eSubject=&amp;amp;version=12.2&amp;amp;akdm=1&amp;amp;filename=Xilinx_ISE_DS_Win_12.2_M.63c.1.1.tar Installer for Windows] TAR/GZ 2.96GB (nepieciešams reģistrēties www.xilinx.com)&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/irn.pdf ISE Design Suite 12: Installation, Licensing, and Release Notes] PDF 1.44MB&lt;br /&gt;
&lt;br /&gt;
* [http://ubuntuforums.org/showthread.php?t=1547435 Xilinx ISE WebPACK 12.2 on Ubuntu 10.04 LTS]&lt;br /&gt;
&lt;br /&gt;
* [http://rmdir.de/~michael/xilinx/ Xilinx JTAG tools on Linux without proprietary kernel modules]&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/ise_tutorial_ug695.pdf ISE In-Depth Tutorial] PDF 5.04MB&lt;br /&gt;
&lt;br /&gt;
* [https://xilinx.webex.com/ec0605l/eventcenter/recording/recordAction.do?theAction=poprecord&amp;amp;actname=%2Feventcenter%2Fframe%2Fg.do&amp;amp;apiname=lsr.php&amp;amp;renewticket=0&amp;amp;renewticket=0&amp;amp;actappname=ec0605l&amp;amp;entappname=url0107l&amp;amp;needFilter=false&amp;amp;&amp;amp;isurlact=true&amp;amp;entactname=%2FnbrRecordingURL.do&amp;amp;rID=31975327&amp;amp;rKey=B2CB97CBBB0026E3&amp;amp;recordID=31975327&amp;amp;rnd=7154034615&amp;amp;siteurl=xilinx&amp;amp;SP=EC&amp;amp;AT=pb&amp;amp;format=short ISE Design Suite: Logic Edition – A Quick Tour] WMV 47.50MB&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/plugin_ism.pdf ISim User Guide] PDF 1.96MB&lt;br /&gt;
&lt;br /&gt;
* [https://xilinx.webex.com/ec0605l/eventcenter/recording/recordAction.do;jsessionid=PHcmMMRfyPT41QMhMNm1ryhh2bK1LyX1bM8bnkS9Qp7qgTTCG2S9!1328041475?theAction=poprecord&amp;amp;actname=%2Feventcenter%2Fframe%2Fg.do&amp;amp;apiname=lsr.php&amp;amp;renewticket=0&amp;amp;renewticket=0&amp;amp;actappname=ec0605l&amp;amp;entappname=url0107l&amp;amp;needFilter=false&amp;amp;&amp;amp;isurlact=true&amp;amp;entactname=%2FnbrRecordingURL.do&amp;amp;rID=41800312&amp;amp;rKey=82ac13e94441c96c&amp;amp;recordID=41800312&amp;amp;rnd=5574793851&amp;amp;siteurl=xilinx&amp;amp;SP=EC&amp;amp;AT=pb&amp;amp;format=short How to Use the ISE Simulator (ISim)] WMV 40.90MB&lt;br /&gt;
&lt;br /&gt;
==== Xilinx Spartan-3E ====&lt;br /&gt;
&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/boards_and_kits/ug230.pdf Xilinx Spartan-3E FPGA Starter Kit Board User Guide] PDF 7.34MB&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/spartan3e_scm.pdf Spartan-3E Libraries Guide for Schematic Designs] PDF 9.19MB&lt;br /&gt;
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/spartan3e_hdl.pdf Spartan-3E Libraries Guide for HDL Designs] PDF 3.94MB&lt;br /&gt;
&lt;br /&gt;
==== Video applications using FPGA ====&lt;br /&gt;
&lt;br /&gt;
* [http://www.stevechamberlin.com/cpu/2009/06/21/fpga-pong/ FPGA Pong] by Steve Chamberlin&lt;br /&gt;
* [http://www.fpga4fun.com/PongGame.html Pong Game] by Jean P. Nicolle&lt;br /&gt;
&lt;br /&gt;
==== HDL tutorials ====&lt;br /&gt;
&lt;br /&gt;
* [http://www.eecs.harvard.edu/cs141/resources/verilog-tutorial.pdf Verilog Tutorial I (10 pages)] PDF 69.58KB&lt;br /&gt;
* [http://www.ece.umd.edu/class/enee359a.S2008/verilog_tutorial.pdf Verilog Tutorial II (227 pages)] PDF 876.25KB&lt;br /&gt;
* [http://www.gmvhdl.com/VHDL.html VHDL Tutorial I (15 pages)]&lt;br /&gt;
* [http://lslwww.epfl.ch/pages/teaching/cours_lsl/sl_info/vhdl-tutorial.pdf VHDL Tutorial II (84 pages)] PDF 391.95KB&lt;br /&gt;
&lt;br /&gt;
==== Atsauksmes par kursu ====&lt;br /&gt;
* DIP 2012-1-m: [http://bit.ly/MVbhuZ] [http://bit.ly/Lvsur2] [http://bit.ly/MX4Upj]&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
==== Dažādi ====&lt;br /&gt;
* [http://www.cpushack.com/ CPU Shack]&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
	<entry>
		<id>http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:MD4&amp;diff=3931</id>
		<title>DIPb10:MD4</title>
		<link rel="alternate" type="text/html" href="http://andromeda.df.lu.lv/wiki/index.php?title=DIPb10:MD4&amp;diff=3931"/>
		<updated>2012-10-11T15:25:00Z</updated>

		<summary type="html">&lt;p&gt;Rinalds: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;* Izveidot loģisko shēmu, kas nodrošina sekojošu funkcionalitāti:&lt;br /&gt;
** INPUTS – A, B (8 biti)&lt;br /&gt;
** OUTPUTS  - Q (8 biti), &amp;#039;&amp;#039;CarryOut&amp;#039;&amp;#039;, &amp;#039;&amp;#039;Overflow&amp;#039;&amp;#039;&lt;br /&gt;
** Q = A + B&lt;br /&gt;
** &amp;#039;&amp;#039;&amp;#039;darbojas ātrāk&amp;#039;&amp;#039;&amp;#039; nekā lekcijā apskatītais &amp;#039;&amp;#039;ripple&amp;#039;&amp;#039; &amp;#039;&amp;#039;carry&amp;#039;&amp;#039; risinājums&lt;br /&gt;
* Iesniegšanas termiņš 05.10.2012 08:30&lt;/div&gt;</summary>
		<author><name>Rinalds</name></author>
		
	</entry>
</feed>