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'''Shortcuts:'''
[[#Calendar | Calendar]] |
[[#Assignments | Assignments]] |
[[#Resources | Resources]] |
[[#{{CURRENTDAY2}}.{{CURRENTMONTH}}.{{CURRENTYEAR}} | Today <small>(if there is a class)</small>]]
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'''Course: Introduction to Processors'''
===Introduction===
The course is about low level hardware architecture of the computers and the programming at that level. In particular, we study ARM Assembly programming language and techniques while discussing the microprocessor resources and features that implement the instructions. The students learn how to develop a code in Assembly and what to consider when implementing efficient programs in higher level languages.

===Deliverables===
* All assignments are due by the end of the day on the due date, unless otherwise specified.

=Calendar=
{| border=1 cellspacing=0 cellpadding=4 style = 'border-color: #ddd;'
|-
! Date
! Topic, content
! Deliverables

|- style='vertical-align: top;'
|
====03.09.2021====
11:10
|
{| width='100%' style='background-color:#ddd;'
|<big>'''Introduction'''</big>
|}
Microprocessors and microcontrollers. Applications. Architectures. Coourse outline.

|

|- style='vertical-align: top;'
|
====14.09.2021====
11:10
|
{| width='100%' style='background-color:#ddd;'
|<big>'''Hexadecimal arithmetic'''</big>
|}
Representation of non-negative numbers in hardware, registers and memory. Decimal, binary, octal, and hexadecimal systems. Converting between the systems.

|

|- style='vertical-align: top;'
|
====17.09.2021====
11:10
|
{| width='100%' style='background-color:#ddd;'
|<big>'''Lab :: Quiz 1'''</big>
|}
'''Lab'''

Practicing the conversion between the systems with different bases

'''Quiz 1'''

Decimal, binary, octal and hexadecimal systems.

|

|- style='vertical-align: top;'
|
====21.09.2021====
11:10
|
{| width='100%' style='background-color:#ddd;'
|<big>'''Two's complement'''</big>
|}
Representing negative numbers in hardware. Register size, and why it is important. Methods for encoding negative numbers: packed, signed, bias, one's complement and two's complement. Converting between the value and two's complement in binary and hexadecimal systems.

|

|- style='vertical-align: top;'
|
====24.09.2021====
11:10
|
{| width='100%' style='background-color:#ddd;'
|<big>'''Lab :: Quiz 2'''</big>
|}
'''Lab'''

Exercises with the two's complement

'''Quiz 2'''

Two's complement.

|

|- style='vertical-align: top;'
|
====28.09.2021====
11:10
|
{| width='100%' style='background-color:#ddd;'
|<big>'''Processor architecture'''</big>
|}
Architecture of a processor. Registers, register file, ALU, datapath. CISC vs. RISC architectures. x86 architecture as CISC representative. ARM architecture as RISC. Instruction encoding.

|

|- style='vertical-align: top;'
|
====01.10.2021====
11:10
|
{| width='100%' style='background-color:#ddd;'
|<big>'''Lab'''</big>
|}
Developing and testing a simple Assembly program. Using cross-compilation tools. Introduction to the Make system.

|

|- style='vertical-align: top;'
|
====05.10.2021====
11:10
|
{| width='100%' style='background-color:#ddd;'
|<big>'''Computing environment'''</big>
|}
Environment and tools for compiling and debugging Assembly programs. Compiler, preprocessor, assembly, linker, loader, debugger. Cross-compilation and toolchains. Emulators and virtual machines.

|

|- style='vertical-align: top;'
|
====08.10.2021====
11:10
|
{| width='100%' style='background-color:#ddd;'
|<big>'''Lab'''</big>
|}
Advanced features of the Make system.

|

|- style='vertical-align: top;'
|
====12.10.2021====
11:10
|
{| width='100%' style='background-color:#ddd;'
|<big>'''ARM Assembly and arithmetic'''</big>
|}
Introduction to ARM Assembly language and programming. Instruction types. Arithmetic instructions. MOV, ADD, SUB. MVN, ADC, SBC, RSB, RSC. Barrel Shifter.

|

|- style='vertical-align: top;'
|
====15.10.2021====
11:10
|
{| width='100%' style='background-color:#ddd;'
|<big>'''Lab'''</big>
|}
Evaluating and following the code "on paper".

|

|- style='vertical-align: top;'
|
====19.10.2021====
11:10
|
{| width='100%' style='background-color:#ddd;'
|<big>'''Flow control and tests'''</big>
|}
Flow control in Assembly. Branch instructions. B, BL, BX, BLX. Working directly with PC register. CPSR flags. Condition field. Bit operations. AND, ORR, EOR, BIC, shift and rotation. CMP, CMN, TST, TEQ. Fast flags and the S postfix.

|

|- style='vertical-align: top;'
|
====22.10.2021====
11:10
|
{| width='100%' style='background-color:#ddd;'
|<big>'''Lab :: Quiz 3'''</big>
|}
'''Lab'''

'''Quiz 3'''

Code comprehension.

|

* '''Due''' '''HW1''' - Arithmetic progression

|- style='vertical-align: top;'
|

====26.10.2021====
11:10
|
{| width='100%' style='background-color:#ddd;'
|<big>'''Memory instructions'''</big>
|}
Reading and writing data to memory. Memory access instructions. STR, LDR, STRB, STRH, LDRB, LDRH, LDRSB, LDRSH. Addressing modes: offset, pre-indexed and post-indexed. Using barrel shifter with addressing. Data alignment in memory.

|

|- style='vertical-align: top;'
|
====29.10.2021====
11:10
|
{| width='100%' style='background-color:#ddd;'
|<big>'''Lab'''</big>
|}
Debugging Assembly programs. Gnu debugger gdb.

|

|- style='vertical-align: top;'
|

====02.11.2021====
11:10
|
{| width='100%' style='background-color:#ddd;'
|<big>'''Calling subroutines and interfacing with C'''</big>
|}
Variable types in C: static, automatic and dynamic. Calling subroutines and parameter passing conventions. Parameters and return value. Stack and registers. Saving the registers, the context. Loading and storing multiple registers: LDM, STM. Interfacing between Assembly and C.

|

|- style='vertical-align: top;'
|
====05.11.2021====
11:10
|
{| width='100%' style='background-color:#ddd;'
|<big>'''Lab'''</big>
|}
Practice passing parameters and working with buffers.
|

|- style='vertical-align: top;'
|

====09.11.2021====
11:10
|
{| width='100%' style='background-color:#ddd;'
|<big>'''Symbols'''</big>
|}
Symbol encoding in hardware and software. Code tables. ASCII. EBCDIC. ISO code tables. Foreign letter symbols. UTF-8, UTF-16. Strings in C and memory. Converting values to symbols and strings.

|

* '''Due''' '''HW2''' - Matrix multiplication

|- style='vertical-align: top;'
|

====12.11.2021====
11:10
|
{| width='100%' style='background-color:#ddd;'
|<big>'''Midterm'''</big>
|}
Data representation in memory.
Assembly code comprehension.
Two programming tasks.

|

|- style='vertical-align: top;'
|
====16.11.2021====
11:10
|
{| width='100%' style='background-color:#ddd;'
|<big>'''Expressions and Macro commands'''</big>
|}
Expressions in Assembly. Operators in expressions. Constants. Assigning values to symbols. Directives: .set, .equiv, .eqv. Conditional compilation. Directives .if, .ifdef, .endif., ifb, .ifc, .ifeqs. More conditionals .ifeq, .ifge, .ifne and others. Macro commands: .macro, .endm., .rept. Recursive macros. Local macros. Macros across sections.

|
* '''Due''' '''M1P1''' - Midterm 1 programming task 1, tested
* '''Due''' '''M1P2''' - Midterm 1 programming task 2, tested

|- style='vertical-align: top;'
|
====23.11.2021====
11:10
|
{| width='100%' style='background-color:#ddd;'
|<big>'''Inline Assembly'''</big>
|}
Including Assembly in C code. Inline code and Assembly code operands. Tasks for the compiler, linker and loader. Dynamic loaders and libraries.

|
|- style='vertical-align: top;'
|

====26.11.2021====
11:10
|
{| width='100%' style='background-color:#ddd;'
|<big>'''Lab'''</big>
|}
Midterm review.

|

|- style='vertical-align: top;'
|

====30.11.2021====
11:10
|
{| width='100%' style='background-color:#ddd;'
|<big>'''Optimizations'''</big>
|}
Execution time for instructions. Case study for code optimization. Leveraging the documentation and specification of instructions. Reordering the code. Unrolling loops. Taking advantage of branch prediction. Cache memory and the code performance.

Documentation: [http://download.intel.com/design/intelxscale/27347302.pdf Intel XScale R Core Developer’s Manual].

The section and focus:
* A.2.1.2 — Processor execution pipe diagram. Instruction and data flow description.
* 10.4 — Instruction execution time. For example, multiplication vs. addition.
* 5 — Branch prediction mechanism
* 4 and 6 — Cache memory. Instruction cache and Data cache.
* A.3–A.5 — Optimizations as suggested by Intel.

|
Due: Choose the format of your exam: Project vs. Test.
|- style='vertical-align: top;'
|

====03.12.2021====
11:10
|
{| width='100%' style='background-color:#ddd;'
|<big>'''Lab'''</big>
|}
Review of the course topics

|

|- style='vertical-align: top;'
|

====13-22.12.2021====

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{| width='100%' style='background-color:#ddd;'
|<big>'''Exam week'''</big>
|}
Time for exams
|

|- style='vertical-align: top;'
|
====16.12.2021====
11:10
|
{| width='100%' style='background-color:#ddd;'
|<big>'''Exam'''</big>
|}
Data representation in memory.
Assembly code comprehension.
Multiple choice questions and a programming task.

|
* '''Due by midnight''' '''ExP1''' - Exam programming task, tested
* '''Due by midnight''' '''Proj''' - Project

|}

=Assignments=
* Homeworks are available from e-Studijas

{{MCU_resources}}

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Leo: Created page with "__NOTOC__ '''Shortcuts:''' Calendar | Assignments | Resources | #{{CURRENTDAY2}}.{{CURRENT..."

Leo: Created page with "NOTOC '''Shortcuts:''' Calendar | Assignments | Resources | #{{CURRENTDAY2}}.{{CURRENT..."