DIPb10:PD4

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Revision as of 15:12, 30 September 2010 by Artis (talk | contribs) (New page: * Uzdevums 1: Xilinx ISE vidē realizēt ALU pēc sekojošas specifikācijas: {| border=1 cellspacing=0 cellpadding=4 |- ! INPUTS ! OUTPUTS ! ! OPCODE ! RESULT ! OPCODE ! RESULT ! ...)
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  • Uzdevums 1: Xilinx ISE vidē realizēt ALU pēc sekojošas specifikācijas:
INPUTS OUTPUTS OPCODE RESULT OPCODE RESULT OPCODE RESULT
A(3:0) RESULT(3:0) 000 A AND B 011 A XOR B 110 reserved
B(3:0) OVERFLOW 001 A OR B 100 A ADD B 111 reserved
OPCODE(2:0) ZERO 010 NOT(A) 101 reserved