Difference between revisions of "Template:DIP saites"

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(Xilinx attīstītajrīki)
(HDL tutorials)
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** [http://www.ece.umd.edu/class/enee359a.S2008/verilog_tutorial.pdf by asic-world] (227 pages) PDF 876.25KB
 
** [http://www.ece.umd.edu/class/enee359a.S2008/verilog_tutorial.pdf by asic-world] (227 pages) PDF 876.25KB
 
** [http://www.asic-world.com/verilog/veritut.html by asic-world, online version]
 
** [http://www.asic-world.com/verilog/veritut.html by asic-world, online version]
 +
** [https://www.nandland.com/verilog/tutorials/tutorial-introduction-to-verilog-for-beginners.html by NANDLand.com]
  
 
* '''VHDL Tutorials'''
 
* '''VHDL Tutorials'''

Revision as of 16:20, 3 October 2019

Literatūra


Digital design textbooks @ Digilent Inc.

Saites

Xilinx produkti (FPGA čipi)

Xilinx attīstītajrīki

DiLab ir pieejami sekojoši Xilinx (Digilent) attīstītajrīki:

Xilinx ISE WebPACK (14.7)

Papildus:

Xilinx ISE WebPACK (12.2)

Video applications using FPGA

HDL tutorials

IP cores priekš FPGA


Ieteikumi prezentāciju veidošanā

Piezīmes par plakātu un prezentāciju veidošanu

Atsauksmes par kursu


Citi kursi un saites

Domu graudi

FPGA pielietojumi