Template:DIP saites: Difference between revisions

From DiLab
Jump to navigation Jump to search
← Older edit
Content deleted Content added
 
(20 intermediate revisions by the same user not shown)
Line 1: Line 1:
= Termini =

* IC - Integrated Circuit - mikroshēma.
* FPGA - Field Programmable Gate Array - Konfigurējams loģisko un citu elementu čips, "lego" kluči digitālai elektronikai.
* EDA - Dizaina plūsma: Electronic Design Automation [https://en.wikipedia.org/wiki/Design_flow_(EDA) (wikipedia)]
* RTL - [https://en.wikipedia.org/wiki/Register-transfer_level Register-Transfer Level] - dizaina abstrakcija, kurā dati plūst starp reģistriem.
* [https://en.wikipedia.org/wiki/GDSII GDSII] - Binārs datubāzes falia formāts IC dizaina apmaiņai industrijā.

= Resursi =
= Resursi =


Line 44: Line 52:


DiLab ir pieejami sekojoši Xilinx (Digilent) attīstītajrīki:
DiLab ir pieejami sekojoši Xilinx (Digilent) attīstītajrīki:

⚫
* '''[http://www.pynq.io/ PYNQ]''' [https://reference.digilentinc.com/reference/programmable-logic/pynq-z1/start -Z1]
⚫
** [https://www.digikey.com/en/articles/techzone/2019/apr/build-and-program-fpga-based-designs-quickly-python-jupyter-notebooks Build and Program FPGA-Based Designs Quickly with Python and Jupyter Notebooks] - with Zynq (PYNQ)


* '''[https://reference.digilentinc.com/reference/programmable-logic/anvyl/start ANVYL]'''
* '''[https://reference.digilentinc.com/reference/programmable-logic/anvyl/start ANVYL]'''
** [https://reference.digilentinc.com/_media/reference/programmable-logic/anvyl/anvyl_rm.pdf Anvyl Reference Manual]
** Anvyl Reference Manual: [https://reference.digilentinc.com/_media/reference/programmable-logic/anvyl/anvyl_rm.pdf (PDF)] [https://digilent.com/reference/programmable-logic/anvyl/reference-manual (Website)]
** [[ANVYL programmēšana]] - kā uzlādēt dizainu uz Anvyl dēļa
** [[ANVYL programmēšana]] - Pamācība, kā uzlādēt dizainu uz Anvyl dēļa
** [https://github.com/elomage/FPGA-resources/tree/main/ucf_templates UCF file templates].
** [https://github.com/elomage/FPGA-resources/tree/main/ucf_templates UCF file templates].

⚫
* '''[http://www.pynq.io/ PYNQ]''' [https://reference.digilentinc.com/reference/programmable-logic/pynq-z1/start -Z1]
⚫
** [https://www.digikey.com/en/articles/techzone/2019/apr/build-and-program-fpga-based-designs-quickly-python-jupyter-notebooks Build and Program FPGA-Based Designs Quickly with Python and Jupyter Notebooks] - with Zynq (PYNQ)


* '''[https://reference.digilentinc.com/reference/programmable-logic/spartan-3e/start Spartan-3E]'''
* '''[https://reference.digilentinc.com/reference/programmable-logic/spartan-3e/start Spartan-3E]'''
Line 88: Line 96:
==== Xilinx ISE WebPACK (14.7) ====
==== Xilinx ISE WebPACK (14.7) ====


* [[ISE 14.7 instalācija]]
Xilinx ISE Webpack versija 14.7 (Windows 7, nevis Windows 10) ir pēdējā versija, kas vēl atbalsta Spartan 3E FPGA.

To iespējams lejuplādēt no [https://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/vivado-design-tools/archive-ise.html Xilinx arhīva web portāla], kurā nepieciešams šim nolūkam izveidot kontu.

* [[ISE WebPACK 14.7 USB driver]] instalācija (vecākiem Spartan 3E rīkiem)
* Jaunākiem (ANVYL) rīkem - [https://digilent.com/reference/software/adept/start Digilent Adept] jāinstallē Utilities un Runtime
Papildus:
* [https://www.xilinx.com/support/answers/59128.html Digilent driver installation] (no Xilinx portāla)
* [http://dreamrunner.org/blog/2012/09/12/install-xilinx-ise-on-the-ubuntu/ Install Xilinx ISE on Ubuntu] (learn&think)
* [https://www.george-smart.co.uk/fpga/xilinx_jtag_linux/ Install Linux ISE] (George Smart)

* [https://www.programmersought.com/article/24731802295/ ISE instalācija uz Ubuntu 18]


<!--
==== Xilinx ISE WebPACK (12.2) ====
==== Xilinx ISE WebPACK (12.2) ====


Line 115: Line 113:
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/ise_tutorial_ug695.pdf ISE In-Depth Tutorial] (ver.12.2) PDF 5.04MB
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/ise_tutorial_ug695.pdf ISE In-Depth Tutorial] (ver.12.2) PDF 5.04MB
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/plugin_ism.pdf ISim User Guide] (ver.12.2) PDF 1.96MB
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_2/plugin_ism.pdf ISim User Guide] (ver.12.2) PDF 1.96MB

< -->


=== Xilinx ISE lietošana ===
=== Xilinx ISE lietošana ===
Line 125: Line 125:
==== Simulācija ar ISim ====
==== Simulācija ar ISim ====


* [https://www.youtube.com/watch?v=9iQfqhUfAcE Kā lietot iSim] (video, Leo Seļāvo)
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_7/plugin_ism.pdf ISim User Guide] (ver.14.7) PDF 1.96MB
* [http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_7/plugin_ism.pdf ISim User Guide] (ver.14.7) PDF 1.96MB
* [https://www.xilinx.com/support/documentation/sw_manuals/xilinx14_7/ug682.pdf ISim in-depth Tutorial] PDF
* [https://www.xilinx.com/support/documentation/sw_manuals/xilinx14_7/ug682.pdf ISim in-depth Tutorial] PDF
* [https://youtu.be/hPYsQE0-1kQ Simulācija ar ISim] - pamācības video
<!-- * [https://youtu.be/hPYsQE0-1kQ Simulācija ar ISim] - pamācības video, Colin O'Flynn. -->


==== Simulācija ar ModelSim ====
==== Simulācija ar ModelSim ====
Line 163: Line 164:
* [https://pynq.readthedocs.io/en/v2.0/pynq_libraries/pmod.html Par PMOD un PYNQ]
* [https://pynq.readthedocs.io/en/v2.0/pynq_libraries/pmod.html Par PMOD un PYNQ]


== HDL tutorials ==
== HDL pamācības (Verilog, VHDL) ==


<!-- (unavailable) * [http://www.eecs.harvard.edu/cs141/resources/verilog-tutorial.pdf Verilog Tutorial I (10 pages)] PDF 69.58KB -->
<!-- (unavailable) * [http://www.eecs.harvard.edu/cs141/resources/verilog-tutorial.pdf Verilog Tutorial I (10 pages)] PDF 69.58KB -->
Line 172: Line 173:
** [http://www.asic-world.com/verilog/veritut.html by asic-world, online version]
** [http://www.asic-world.com/verilog/veritut.html by asic-world, online version]
** [https://www.nandland.com/verilog/tutorials/tutorial-introduction-to-verilog-for-beginners.html by NANDLand.com]
** [https://www.nandland.com/verilog/tutorials/tutorial-introduction-to-verilog-for-beginners.html by NANDLand.com]
** [https://www.asic-world.com/tidbits/verilog_fsm.html FSM pamācība] no asic-world.com


* '''VHDL Tutorials'''
* '''VHDL Tutorials'''
Line 177: Line 179:
** [http://lslwww.epfl.ch/pages/teaching/cours_lsl/sl_info/vhdl-tutorial.pdf VHDL Tutorial II (84 pages)] PDF 391.95KB
** [http://lslwww.epfl.ch/pages/teaching/cours_lsl/sl_info/vhdl-tutorial.pdf VHDL Tutorial II (84 pages)] PDF 391.95KB


* Debouncing
⚫
== RISC V ==
** [https://www.fpga4student.com/2017/04/simple-debouncing-verilog-code-for.html Verilog code for debouncing buttons on FPGA]


⚫
== RISC-V ==
RISC V Assemblers:

* [https://riscv.org/technical/specifications/ Specifications]
* [https://github.com/riscv-non-isa/riscv-asm-manual/blob/master/riscv-asm.md Getting started] - Assembly manual
* [https://github.com/riscv-non-isa/riscv-asm-manual/blob/master/riscv-asm.md Getting started] - Assembly manual
* [https://www.cl.cam.ac.uk/teaching/1617/ECAD+Arch/files/docs/RISCVGreenCardv8-20151013.pdf Green card]
* [https://www.cl.cam.ac.uk/teaching/1617/ECAD+Arch/files/docs/RISCVGreenCardv8-20151013.pdf Green card]
* [https://five-embeddev.com/riscv-isa-manual/latest/instr-table.html RISC-V Instruction Set Manual] from five-embeddev.com
* [https://www.cs.cornell.edu/courses/cs3410/2019sp/riscv/interpreter/ RISC-V Interpretators online]
* [https://riscvasm.lucasteske.dev/# RISC-V Online Assembler]


== Seriālie protokoli ==
== Seriālie protokoli ==
Line 248: Line 256:


* [https://youtu.be/TPbroUDHG0s Spēļu programmēšana 8 bitu arhitektūrā]
* [https://youtu.be/TPbroUDHG0s Spēļu programmēšana 8 bitu arhitektūrā]

* [https://youtu.be/V9xUQWo4vN0 Tranzistors] - 1953.gada dokumentālā filma


== FPGA pielietojumi ==
== FPGA pielietojumi ==
* [http://www.wired.com/2014/06/microsoft-fpga/ Microsoft Supercharges Bing Search With Programmable Chips]
* [http://www.wired.com/2014/06/microsoft-fpga/ Microsoft Supercharges Bing Search With Programmable Chips]
* [https://tang.sipeed.com/en/ Tang primer board] for RISC V
* [https://thedatabus.io/fpga-buying-guide FPGA buying guide]

Latest revision as of 10:28, 19 February 2026

Termini

  • IC - Integrated Circuit - mikroshēma.
  • FPGA - Field Programmable Gate Array - Konfigurējams loģisko un citu elementu čips, "lego" kluči digitālai elektronikai.
  • EDA - Dizaina plūsma: Electronic Design Automation (wikipedia)
  • RTL - Register-Transfer Level - dizaina abstrakcija, kurā dati plūst starp reģistriem.
  • GDSII - Binārs datubāzes falia formāts IC dizaina apmaiņai industrijā.

Resursi


Digital design textbooks @ Digilent Inc.

Saites

Xilinx produkti (FPGA čipi)

Xilinx attīstītajrīki

DiLab ir pieejami sekojoši Xilinx (Digilent) attīstītajrīki:


PMOD papildus moduļi

Mums ir pieejami dažādi PMOD perifērijas iekārtu moduļi (pārsvarā 1x6 formātā) par kuriem sīkāk var lasīt Digilentic portālā.

Xilinx ISE instalācija

Xilinx ISE WebPACK (14.7)


Xilinx ISE lietošana

Vispārīga lietošana

Simulācija ar ISim

Simulācija ar ModelSim

Video applications using FPGA

ANVYL attīstītājrīks

ANVYL ir Xilinx Spartan 6G FPGA bāzēts attīstītājrīks ar dažādām papildus un perifērijas iekārtām.

PYNQ ietvars

PYNQ ir ietvars kas iespējo FPGA aparatūras funkciju izmantošanu ar Python programmēšanas valodu. Atbalstītā aparatūra iekļauj ZYNQ.

PYNQ informācijas avoti:

PYNQ projekti

PYNK un PMOD

HDL pamācības (Verilog, VHDL)

RISC-V

Seriālie protokoli

IP cores priekš FPGA


Ieteikumi prezentāciju veidošanā

Piezīmes par plakātu un prezentāciju veidošanu

Citi kursi un saites

  • 8 Bit Workshop - aparatūras simulators pārlūkā, tai skaitā Verilog.

Domu graudi

FPGA pielietojumi

Retrieved from "https://andromeda.df.lu.lv/wiki/index.php?title=Template:DIP_saites&oldid=11205"