VLSI
Open source VLSI design notes.
From Verilog/VHDL to GDSII for SKY or IHP technologies.
Prerequisites
These notes assume the host has Linux, e.g. Ubuntu 24.04 set up. All tools will be running under it.
Open Tools
Essential OSS HW design tools
- gtkwave - Waveform viewer
- iverilog - Icarus Verilog compiler
- Verilator - compile RTL to C++, faster simulations
- Yosys - RTL to gate level netlist
- SymbiFlow - Toolchain to FPGA
- Magic VLSI - transistor level layout design editor
- KLayout - viewer and editor of GDSII files
- OpenRoad - Automates floorplanning, placement, routing and timing.
- OpenLane - Automated design flow, from verilog to GDSII, uses the tools above.
Open Technology PDKs
Process development kits (PDK) available for OSS VLSI:
- SKY 130 PDK - Process Design Kit by Google and Efabless
- IHP PDK
- Open Source PDK in 130nm BiCMOS, developed for Analog/Digital, Mixed Signal and RF ASIC Design
- ReadTheDocs
Tapeout
TinyTapeout: from idea/design to chip/PCB
Setup Openline2
The advised path is to setup NIX envbironment and then run openline from there, rather than using a dockerized version.
My local setup
This is how I use the Openlane2 tools after the setup.
One important note is that they generate MANY intermediate and log files in the "runs" directory under your project, every time you run openlane. Usually my project is mapped toa cloud drive such as Dropbox, and spamming it with tons of files may create confusion when receiving an email later that someone has deleted 2000+ files from your account. Therefore I save the runs locally, outside the project directory. To achieve that, I run the following commands:
cd git.local/openlane2
nix-shell
openlane --smoke_test # Sanity test for the tools
cd your/project/
run_openlane_local.sh config.json # will save run logs under work.local/... (recommended)
or
opennlane config.json # will save the run logs in the project directory work/... (cloud?!)
Usecase: Simple counter
Usecase: RAM integration
TODO.
Usecase: NeoRV32 MCU
NeoRV32 is an open source MCU with many peripheral options written in VHDL.