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Calendar

Date

Topic, content

Deliverables

14.09.2021

Introduction

Microprocessors and microcontrollers. Applications. Architectures. Coourse outline.

21.09.2021

Hexadecimal arithmetic

Representation of non-negative numbers in hardware, registers and memory. Decimal, binary, octal, and hexadecimal systems. Converting between the systems.

Quiz 1

Decimal, binary, octal and hexadecimal systems.

28.09.2021

Two's complement

Representing negative numbers in hardware. Register size, and why it is important. Methods for encoding negative numbers: packed, signed, bias, one's complement and two's complement. Converting between the value and two's complement in binary and hexadecimal systems.

Quiz 2

Two's complement.

05.10.2021

Processor architecture

Architecture of a processor. Registers, register file, ALU, datapath. CISC vs. RISC architectures. x86 architecture as CISC representative. ARM architecture as RISC. Instruction encoding.

Developing and testing a simple Assembly program. Using cross-compilation tools. Introduction to the Make system.

12.10.2021

Computing environment

Environment and tools for compiling and debugging Assembly programs. Compiler, preprocessor, assembly, linker, loader, debugger. Cross-compilation and toolchains. Emulators and virtual machines.

Announced: HW1 - Arithmetic progression

19.10.2021

ARM Assembly and arithmetic

Introduction to ARM Assembly language and programming. Instruction types. Arithmetic instructions. MOV, ADD, SUB. MVN, ADC, SBC, RSB, RSC. Barrel Shifter.

Evaluating and following the code "on paper".

26.10.2021

Flow control and tests

Flow control in Assembly. Branch instructions. B, BL, BX, BLX. Working directly with PC register. CPSR flags. Condition field. Bit operations. AND, ORR, EOR, BIC, shift and rotation. CMP, CMN, TST, TEQ. Fast flags and the S postfix.

Quiz 3

Code comprehension.

Announced: HW2 - Matrix multiplication

02.11.2021

Memory instructions

Reading and writing data to memory. Memory access instructions. STR, LDR, STRB, STRH, LDRB, LDRH, LDRSB, LDRSH. Addressing modes: offset, pre-indexed and post-indexed. Using barrel shifter with addressing. Data alignment in memory.

Due HW1 - Arithmetic progression

09.11.2021

Calling subroutines and interfacing with C

Variable types in C: static, automatic and dynamic. Calling subroutines and parameter passing conventions. Parameters and return value. Stack and registers. Saving the registers, the context. Loading and storing multiple registers: LDM, STM. Interfacing between Assembly and C.

16.11.2021

Symbols

Symbol encoding in hardware and software. Code tables. ASCII. EBCDIC. ISO code tables. Foreign letter symbols. UTF-8, UTF-16. Strings in C and memory. Converting values to symbols and strings.

Due HW2 - Matrix multiplication

23.11.2021

Midterm

Data representation in memory. Assembly code comprehension. Two programming tasks.

Assignment Proj - Project choice

30.11.2021

Expressions and Macro commands

Expressions in Assembly. Operators in expressions. Constants. Assigning values to symbols. Directives: .set, .equiv, .eqv. Conditional compilation. Directives .if, .ifdef, .endif., ifb, .ifc, .ifeqs. More conditionals .ifeq, .ifge, .ifne and others. Macro commands: .macro, .endm., .rept. Recursive macros. Local macros. Macros across sections.

Due M1P1 - Midterm 1 programming task 1, tested
Due M1P2 - Midterm 1 programming task 2, tested

07.12.2021

Inline Assembly

Including Assembly in C code. Inline code and Assembly code operands. Tasks for the compiler, linker and loader. Dynamic loaders and libraries.

Due: Choice: Written exam vs. programming project (in eStudijas)

14.12.2021

Optimizations

Execution time for instructions. Case study for code optimization. Leveraging the documentation and specification of instructions. Reordering the code. Unrolling loops. Taking advantage of branch prediction. Cache memory and the code performance.

Documentation: Intel XScale R Core Developer’s Manual.

The section and focus:

A.2.1.2 — Processor execution pipe diagram. Instruction and data flow description.
10.4 — Instruction execution time. For example, multiplication vs. addition.
5 — Branch prediction mechanism
4 and 6 — Cache memory. Instruction cache and Data cache.
A.3–A.5 — Optimizations as suggested by Intel.

21.12.2021

Systems on chip (SoC)

Datasheets
Memory map
Communications protocols (RS232, USB, SPI, I2C, 1-wire, CAN)
Peripherals
Watchdog timer
Bootstraping

Lab: Review of the course topics

14.01.2022

8:30

Exam

Data representation in memory. Assembly code comprehension. Multiple choice questions and a programming task.

Due by the end of the day: ExP1 - Exam programming task, tested

Assignments

Homework HW1 is available from e-Studijas

Resources

Tutorials

Setting up ARM development environment on Ubuntu

Make

GDB

GDB tutorial from UMD
GDB getting started tutorial

GDB commands in short from PDX
GDB manual

Remote debugging example

Debugging myprog with a parameter 10.

First, start the qemu emulator, providing the communications port (12345), and run it in background (&).
- Before you do this, make sure that the port is not in use by anyone or anything.
Then start the gdb-multiarch with the name of the program and
Use the gdb command "remote target" with address (localhost) and the port (12345).
Finally start the program execution with "continue". Perhaps, you may want to set some breakpoints before that.

$ qemu-arm -L /usr/arm-linux-gnueabi -g 12345 myprog 10 &
$ gdb-multiarch myprog
    (gdb) target remote localhost:12345
    (gdb) continue

A few essential GDB commands


GDB command	Shortcut	Description
run		Run the program from the beginning
continue	c	Continue (or start) the execution of the program
step	s	Execute the current line from the source. If there is a function call, step into it. This command can have a parameter n that tells how many steps to make.
next	n	Execute the current line from the source. If there is a function call, stop after running it. This command can have a parameter n that tells how many steps to make.
break <x>	b <x>	Set a "breakpoint" to <x>, where <x> could be: line_number in the current source code file filename:line_number function_name filename:function_name *address ...and many others
list	l	Shows the source code (lines). Could be followed by a function_name or file:line_number
info registers	i r	Prints all registers and their values. Can be followed by one or more register names.
set step mode on		Set running mode such that "step" will enter the code that has no debug information available. Using "off" instead of "on" resets this mode.

ARM

ARM instruction set quick reference - from U.Wisconsin.

A32 instruction summary
Application Binary Interface (ABI) for the Arm architecture
ARM A32 instruction set. Note, that ARM has several instruction sets described here

Xscale

Intel XScale Microarchitecture Assembly Language Quick Reference Card ARM Instruction Set, Intel Corporation, 2001
Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Developer’s Manual, ON: 252480-006US, Intel Corporation, 2006
Intel XScale(R) Core Developer’s Manual
Intel XScale R Core Developer’s Manual, ON: 273473-002, Intel Corporation, 2004

Insights

Teach yourself programming in 10 years by Peter Norvig
Should I learn assembly language to program a microcontroller? - Answer on Quora by software R&D professional with 40 years of experience.

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