BITL MCU

Shortcuts: Calendar | Assignments | Resources | Today (if there is a class) Course: Introduction to Processors

Introduction

The course is about low level hardware architecture of the computers and the programming at that level. In particular, we study ARM Assembly programming language and techniques while discussing the microprocessor resources and features that implement the instructions. The students learn how to develop a code in Assembly and what to consider when implementing efficient programs in higher level languages.

Deliverables

• All assignments are due by the end of the day on the due date, unless otherwise specified.

Calendar

Date	Topic, content	Deliverables
05.09.2022 11:10	Introduction Microprocessors and microcontrollers. Applications. Architectures. Coourse outline.
12.09.2022 11:10	Hexadecimal arithmetic Representation of non-negative numbers in hardware, registers and memory. Decimal, binary, octal, and hexadecimal systems. Converting between the systems.
16.09.2022 11:10	Lab :: Quiz 1 Lab Practicing the conversion between the systems with different bases Quiz 1 Decimal, binary, octal and hexadecimal systems.
19.09.2022 11:10	Two's complement Representing negative numbers in hardware. Register size, and why it is important. Methods for encoding negative numbers: packed, signed, bias, one's complement and two's complement. Converting between the value and two's complement in binary and hexadecimal systems.
23.09.2022 11:10	Lab :: Quiz 2 Lab Exercises with the two's complement Quiz 2 Two's complement.
26.09.2022 11:10	Processor architecture Architecture of a processor. Registers, register file, ALU, datapath. CISC vs. RISC architectures. x86 architecture as CISC representative. ARM architecture as RISC. Instruction encoding.
30.09.2022 11:10	Lab Developing and testing a simple Assembly program. Using cross-compilation tools. Introduction to the Make system.
03.10.2022 11:10	Computing environment Environment and tools for compiling and debugging Assembly programs. Compiler, preprocessor, assembly, linker, loader, debugger. Cross-compilation and toolchains. Emulators and virtual machines.
07.10.2022 11:10	Lab Advanced features of the Make system.
10.10.2022 11:10	ARM Assembly and arithmetic Introduction to ARM Assembly language and programming. Instruction types. Arithmetic instructions. MOV, ADD, SUB. MVN, ADC, SBC, RSB, RSC. Barrel Shifter.
14.10.2022 11:10	Lab Evaluating and following the code "on paper".
17.10.2022 11:10	Flow control and tests Flow control in Assembly. Branch instructions. B, BL, BX, BLX. Working directly with PC register. CPSR flags. Condition field. Bit operations. AND, ORR, EOR, BIC, shift and rotation. CMP, CMN, TST, TEQ. Fast flags and the S postfix.
21.10.2022 11:10	Lab :: Quiz 3 Lab Quiz 3 Code comprehension.	Due HW1
24.10.2022 11:10	Memory instructions Reading and writing data to memory. Memory access instructions. STR, LDR, STRB, STRH, LDRB, LDRH, LDRSB, LDRSH. Addressing modes: offset, pre-indexed and post-indexed. Using barrel shifter with addressing. Data alignment in memory.
28.10.2022 11:10	Lab Debugging Assembly programs. Gnu debugger gdb.
31.10.2022 11:10	Calling subroutines and interfacing with C Variable types in C: static, automatic and dynamic. Calling subroutines and parameter passing conventions. Parameters and return value. Stack and registers. Saving the registers, the context. Loading and storing multiple registers: LDM, STM. Interfacing between Assembly and C.
04.11.2022 11:10	Lab Practice passing parameters and working with buffers.
07.11.2022 11:10	Symbols Symbol encoding in hardware and software. Code tables. ASCII. EBCDIC. ISO code tables. Foreign letter symbols. UTF-8, UTF-16. Strings in C and memory. Converting values to symbols and strings.	Due HW2
11.11.2022 11:10	Midterm Data representation in memory. Assembly code comprehension. Two programming tasks.
14.11.2022 11:10	Expressions and Macro commands Expressions in Assembly. Operators in expressions. Constants. Assigning values to symbols. Directives: .set, .equiv, .eqv. Conditional compilation. Directives .if, .ifdef, .endif., ifb, .ifc, .ifeqs. More conditionals .ifeq, .ifge, .ifne and others. Macro commands: .macro, .endm., .rept. Recursive macros. Local macros. Macros across sections.
21.11.2022 11:10	Inline Assembly Including Assembly in C code. Inline code and Assembly code operands. Tasks for the compiler, linker and loader. Dynamic loaders and libraries.
25.11.2022 11:10	Lab Midterm review.
28.11.2022 11:10	Optimizations Execution time for instructions. Case study for code optimization. Leveraging the documentation and specification of instructions. Reordering the code. Unrolling loops. Taking advantage of branch prediction. Cache memory and the code performance. Documentation: Intel XScale R Core Developer’s Manual. The section and focus: A.2.1.2 — Processor execution pipe diagram. Instruction and data flow description. 10.4 — Instruction execution time. For example, multiplication vs. addition. 5 — Branch prediction mechanism 4 and 6 — Cache memory. Instruction cache and Data cache. A.3–A.5 — Optimizations as suggested by Intel.	Due: Choose the format of your exam: Project vs. Test.
02.12.2022 11:10	Lab Review of the course topics
12-22.12.2022	Exam week Time for exams
16.12.2022 11:10	Exam	All deliverables due

Assignments

• Homeworks are available from e-Studijas

Resources

Tutorials

• Setting up ARM development environment on Ubuntu

Make

• A simple Makefile tutorial
• Embedded Programming using the GNU Toolchain
• GNU Make manual

GDB

• GDB tutorial from UMD
• GDB getting started tutorial

• GDB commands in short from PDX
• GDB manual

Remote debugging example

Debugging myprog with a parameter 10.

• First, start the qemu emulator, providing the communications port (12345), and run it in background (&).
  • Before you do this, make sure that the port is not in use by anyone or anything.
• Then start the gdb-multiarch with the name of the program and
• Use the gdb command "remote target" with address (localhost) and the port (12345).
• Finally start the program execution with "continue". Perhaps, you may want to set some breakpoints before that.

$ qemu-arm -L /usr/arm-linux-gnueabi -g 12345 myprog 10 &
$ gdb-multiarch myprog
    (gdb) target remote localhost:12345
    (gdb) continue

A few essential GDB commands

GDB command	Shortcut	Description
run		Run the program from the beginning
continue	c	Continue (or start) the execution of the program
step	s	Execute the current line from the source. If there is a function call, step into it. This command can have a parameter n that tells how many steps to make.
next	n	Execute the current line from the source. If there is a function call, stop after running it. This command can have a parameter n that tells how many steps to make.
break <x>	b <x>	Set a "breakpoint" to <x>, where <x> could be: line_number in the current source code file filename:line_number function_name filename:function_name *address ...and many others
list	l	Shows the source code (lines). Could be followed by a function_name or file:line_number
info registers	i r	Prints all registers and their values. Can be followed by one or more register names.
set step mode on		Set running mode such that "step" will enter the code that has no debug information available. Using "off" instead of "on" resets this mode.

ARM

• ARM instruction set quick reference - from U.Wisconsin.

• A32 instruction summary
• Application Binary Interface (ABI) for the Arm architecture
• ARM A32 instruction set. Note, that ARM has several instruction sets described here

Xscale

• Intel XScale Microarchitecture Assembly Language Quick Reference Card ARM Instruction Set, Intel Corporation, 2001
• Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Developer’s Manual, ON: 252480-006US, Intel Corporation, 2006
• Intel XScale(R) Core Developer’s Manual
• Intel XScale R Core Developer’s Manual, ON: 273473-002, Intel Corporation, 2004

Insights

• Teach yourself programming in 10 years by Peter Norvig
• Should I learn assembly language to program a microcontroller? - Answer on Quora by software R&D professional with 40 years of experience.