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[[#Assignments | Assignments]] | |
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[[#Resources | Resources]] | |
[[#Resources | Resources]] | |
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[[#{{CURRENTDAY2}}.{{CURRENTMONTH}}.{{CURRENTYEAR}} |
[[#{{CURRENTDAY2}}.{{CURRENTMONTH}}.{{CURRENTYEAR}} | Today <small>(if there is a class)</small>]] |
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'''Course: Introduction to Processors''' |
'''Course: Introduction to Processors''' |
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===Introduction=== |
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The course is about low level hardware architecture of the computers and the programming at that level. In particular, we study ARM Assembly programming language and techniques while discussing the microprocessor resources and features that implement the instructions. The students learn how to develop a code in Assembly and what to consider when implementing efficient programs in higher level languages. |
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===Deliverables=== |
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* All assignments are due by the end of the day on the due date, unless otherwise specified. |
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=Calendar= |
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'''Lab''' |
'''Lab''' |
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Practicing the conversion between the |
Practicing the conversion between the systems with different bases |
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'''Quiz 1''' |
'''Quiz 1''' |
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* Assignment '''Lab_Binary''' - Lab |
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* Assignment '''Lab_Complement''' - Lab |
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* Assignment '''Lab_Make''' - Lab |
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'''Lab''' |
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'''Quiz 3''' |
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* Assignment '''Lab_Debug''' - Lab |
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* '''Due''' '''HW1''' - Arithmetic progression |
* '''Due''' '''HW1''' - Arithmetic progression |
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|<big>'''Lab'''</big> |
|<big>'''Lab'''</big> |
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TBD |
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* Assignment '''Lab_TBD''' - Lab |
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Practice passing parameters and working with buffers. |
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TBD |
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|<big>''' |
|<big>'''Inline Assembly'''</big> |
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TBD |
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* Assignment '''Lab_TBD''' - Lab |
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|<big>''' |
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Midterm review. |
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Execution time for instructions. Case study for code optimization. Leveraging the documentation and specification of instructions. Reordering the code. Unrolling loops. Taking advantage of branch prediction. Cache memory and the code performance. |
Execution time for instructions. Case study for code optimization. Leveraging the documentation and specification of instructions. Reordering the code. Unrolling loops. Taking advantage of branch prediction. Cache memory and the code performance. |
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Documentation: [http://download.intel.com/design/intelxscale/27347302.pdf Intel XScale R Core Developer’s Manual]. |
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The section and focus: |
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* A.2.1.2 — Processor execution pipe diagram. Instruction and data flow description. |
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* 10.4 — Instruction execution time. For example, multiplication vs. addition. |
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* 5 — Branch prediction mechanism |
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* 4 and 6 — Cache memory. Instruction cache and Data cache. |
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* A.3–A.5 — Optimizations as suggested by Intel. |
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Due: Choose the format of your exam: Project vs. Test. |
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* Assignment '''Lab_Summary''' - Lab |
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* '''Due By midnight''' '''Proj''' - Project |
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* '''Due''' ''' |
* '''Due by midnight''' '''ExP1''' - Exam programming task, tested |
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=Assignments= |
=Assignments= |
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* Homeworks are available from e-Studijas |
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=Resources= |
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*[https://www.cs.colby.edu/maxwell/courses/tutorials/maketutor/ A simple Makefile tutorial] |
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* [https://developers.redhat.com/blog/2021/04/30/the-gdb-developers-gnu-debugger-tutorial-part-1-getting-started-with-the-debugger GDB getting started tutorial] |
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====ARM==== |
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* [https://developer.arm.com/architectures/instruction-sets/base-isas/a32 ARM A32 instruction set]. Note, that ARM has several [https://developer.arm.com/architectures/instruction-sets instruction sets described here] |
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* [https://developer.arm.com/architectures/system-architectures/software-standards/abi Application Binary Interface (ABI)] for the Arm architecture |
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{{MCU_resources}} |
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* [http://pages.cs.wisc.edu/~markhill/restricted/arm_isa_quick_reference.pdf ARM instruction set quick reference] - from U.Wisconsin. |
Revision as of 11:50, 30 November 2021
Shortcuts: Calendar | Assignments | Resources | Today (if there is a class) Course: Introduction to Processors
Introduction
The course is about low level hardware architecture of the computers and the programming at that level. In particular, we study ARM Assembly programming language and techniques while discussing the microprocessor resources and features that implement the instructions. The students learn how to develop a code in Assembly and what to consider when implementing efficient programs in higher level languages.
Deliverables
- All assignments are due by the end of the day on the due date, unless otherwise specified.
Calendar
Date | Topic, content | Deliverables | |
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03.09.202111:10 |
Microprocessors and microcontrollers. Applications. Architectures. Coourse outline. |
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14.09.202111:10 |
Representation of non-negative numbers in hardware, registers and memory. Decimal, binary, octal, and hexadecimal systems. Converting between the systems. |
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17.09.202111:10 |
Lab Practicing the conversion between the systems with different bases Quiz 1 Decimal, binary, octal and hexadecimal systems. |
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21.09.202111:10 |
Representing negative numbers in hardware. Register size, and why it is important. Methods for encoding negative numbers: packed, signed, bias, one's complement and two's complement. Converting between the value and two's complement in binary and hexadecimal systems. |
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24.09.202111:10 |
Lab Exercises with the two's complement Quiz 2 Two's complement. |
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28.09.202111:10 |
Architecture of a processor. Registers, register file, ALU, datapath. CISC vs. RISC architectures. x86 architecture as CISC representative. ARM architecture as RISC. Instruction encoding. |
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01.10.202111:10 |
Developing and testing a simple Assembly program. Using cross-compilation tools. Introduction to the Make system. |
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05.10.202111:10 |
Environment and tools for compiling and debugging Assembly programs. Compiler, preprocessor, assembly, linker, loader, debugger. Cross-compilation and toolchains. Emulators and virtual machines. |
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08.10.202111:10 |
Advanced features of the Make system. |
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12.10.202111:10 |
Introduction to ARM Assembly language and programming. Instruction types. Arithmetic instructions. MOV, ADD, SUB. MVN, ADC, SBC, RSB, RSC. Barrel Shifter. |
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15.10.202111:10 |
Evaluating and following the code "on paper". |
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19.10.202111:10 |
Flow control in Assembly. Branch instructions. B, BL, BX, BLX. Working directly with PC register. CPSR flags. Condition field. Bit operations. AND, ORR, EOR, BIC, shift and rotation. CMP, CMN, TST, TEQ. Fast flags and the S postfix. |
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22.10.202111:10 |
Lab Quiz 3 Code comprehension. |
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26.10.202111:10 |
Reading and writing data to memory. Memory access instructions. STR, LDR, STRB, STRH, LDRB, LDRH, LDRSB, LDRSH. Addressing modes: offset, pre-indexed and post-indexed. Using barrel shifter with addressing. Data alignment in memory. |
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29.10.202111:10 |
Debugging Assembly programs. Gnu debugger gdb. |
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02.11.202111:10 |
Variable types in C: static, automatic and dynamic. Calling subroutines and parameter passing conventions. Parameters and return value. Stack and registers. Saving the registers, the context. Loading and storing multiple registers: LDM, STM. Interfacing between Assembly and C. |
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05.11.202111:10 |
Practice passing parameters and working with buffers. |
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09.11.202111:10 |
Symbol encoding in hardware and software. Code tables. ASCII. EBCDIC. ISO code tables. Foreign letter symbols. UTF-8, UTF-16. Strings in C and memory. Converting values to symbols and strings. |
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12.11.202111:10 |
Data representation in memory. Assembly code comprehension. Two programming tasks. |
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16.11.202111:10 |
Expressions in Assembly. Operators in expressions. Constants. Assigning values to symbols. Directives: .set, .equiv, .eqv. Conditional compilation. Directives .if, .ifdef, .endif., ifb, .ifc, .ifeqs. More conditionals .ifeq, .ifge, .ifne and others. Macro commands: .macro, .endm., .rept. Recursive macros. Local macros. Macros across sections. |
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23.11.202111:10 |
Including Assembly in C code. Inline code and Assembly code operands. Tasks for the compiler, linker and loader. Dynamic loaders and libraries. |
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26.11.202111:10 |
Midterm review. |
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30.11.202111:10 |
Execution time for instructions. Case study for code optimization. Leveraging the documentation and specification of instructions. Reordering the code. Unrolling loops. Taking advantage of branch prediction. Cache memory and the code performance. Documentation: Intel XScale R Core Developer’s Manual. The section and focus:
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Due: Choose the format of your exam: Project vs. Test. | |
03.12.202111:10 |
Review of the course topics |
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13-22.12.2021 |
Time for exams |
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16.12.202111:10 |
Data representation in memory. Assembly code comprehension. Multiple choice questions and a programming task. |
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Assignments
- Homeworks are available from e-Studijas
Resources
Tutorials
- Setting up ARM development environment on Ubuntu
Make
GDB
- GDB tutorial from UMD
- GDB getting started tutorial
- GDB commands in short from PDX
- GDB manual
Remote debugging example
Debugging myprog with a parameter 10.
- First, start the qemu emulator, providing the communications port (12345), and run it in background (&).
- Before you do this, make sure that the port is not in use by anyone or anything.
- Then start the gdb-multiarch with the name of the program and
- Use the gdb command "remote target" with address (localhost) and the port (12345).
- Finally start the program execution with "continue". Perhaps, you may want to set some breakpoints before that.
$ qemu-arm -L /usr/arm-linux-gnueabi -g 12345 myprog 10 & $ gdb-multiarch myprog (gdb) target remote localhost:12345 (gdb) continue
A few essential GDB commands
GDB command | Shortcut | Description |
run | Run the program from the beginning | |
continue | c | Continue (or start) the execution of the program |
step | s | Execute the current line from the source. If there is a function call, step into it.
This command can have a parameter n that tells how many steps to make. |
next | n | Execute the current line from the source. If there is a function call, stop after running it.
This command can have a parameter n that tells how many steps to make. |
break <x> | b <x> |
Set a "breakpoint" to <x>, where <x> could be:
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list | l | Shows the source code (lines). Could be followed by a function_name or file:line_number |
info registers | i r | Prints all registers and their values. Can be followed by one or more register names. |
set step mode on | Set running mode such that "step" will enter the code that has no debug information available.
Using "off" instead of "on" resets this mode. |
ARM
- ARM instruction set quick reference - from U.Wisconsin.
- A32 instruction summary
- Application Binary Interface (ABI) for the Arm architecture
- ARM A32 instruction set. Note, that ARM has several instruction sets described here
Xscale
- Intel XScale Microarchitecture Assembly Language Quick Reference Card ARM Instruction Set, Intel Corporation, 2001
- Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Developer’s Manual, ON: 252480-006US, Intel Corporation, 2006
- Intel XScale(R) Core Developer’s Manual
- Intel XScale R Core Developer’s Manual, ON: 273473-002, Intel Corporation, 2004
Insights
- Teach yourself programming in 10 years by Peter Norvig
- Should I learn assembly language to program a microcontroller? - Answer on Quora by software R&D professional with 40 years of experience.