Difference between revisions of "Template:DIP saites"

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(Ieteikumi prezentāciju veidošanā)
(HDL tutorials)
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* [http://www.xilinx.com/univ/xupv2p.html XUP V2P]
 
* [http://www.xilinx.com/univ/xupv2p.html XUP V2P]
  
 
+
* [https://www.digikey.com/en/articles/techzone/2019/apr/build-and-program-fpga-based-designs-quickly-python-jupyter-notebooks Build and Program FPGA-Based Designs Quickly with Python and Jupyter Notebooks] - with Zynq (PYNQ)
  
 
=== Xilinx ISE WebPACK (14.7) ===
 
=== Xilinx ISE WebPACK (14.7) ===
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** [http://www.ece.umd.edu/class/enee359a.S2008/verilog_tutorial.pdf by asic-world] (227 pages) PDF 876.25KB
 
** [http://www.ece.umd.edu/class/enee359a.S2008/verilog_tutorial.pdf by asic-world] (227 pages) PDF 876.25KB
 
** [http://www.asic-world.com/verilog/veritut.html by asic-world, online version]
 
** [http://www.asic-world.com/verilog/veritut.html by asic-world, online version]
 +
** [https://www.nandland.com/verilog/tutorials/tutorial-introduction-to-verilog-for-beginners.html by NANDLand.com]
  
 
* '''VHDL Tutorials'''
 
* '''VHDL Tutorials'''
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== Ieteikumi prezentāciju veidošanā ==
 
== Ieteikumi prezentāciju veidošanā ==
[http://andromeda.df.lu.lv/wiki/index.php/LU::poster-howto | Piezīmes par plakātu un prezentāciju veidošanu]
+
[http://andromeda.df.lu.lv/wiki/index.php/LU::poster-howto Piezīmes par plakātu un prezentāciju veidošanu]
  
 
== Atsauksmes par kursu ==
 
== Atsauksmes par kursu ==
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* [http://www.pldworld.com/_xilinx/html/tip/sixeasypieces.htm Six Easy Pieces (Non-Synchronous Circuit Tricks)]
 
* [http://www.pldworld.com/_xilinx/html/tip/sixeasypieces.htm Six Easy Pieces (Non-Synchronous Circuit Tricks)]
 +
 +
* [https://www.sigenics.com/page/asic-cost-calculator ASIC izmaksu kalkulators] (Sigenics)
  
 
== Domu graudi ==
 
== Domu graudi ==
  
 
* [http://stackoverflow.com/questions/11227809/why-is-processing-a-sorted-array-faster-than-an-unsorted-array Why is processing a sorted array faster than an unsorted array? (Branch prediction)]
 
* [http://stackoverflow.com/questions/11227809/why-is-processing-a-sorted-array-faster-than-an-unsorted-array Why is processing a sorted array faster than an unsorted array? (Branch prediction)]
 +
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* [https://www.acm.org/hennessy-patterson-turing-lecture 2017 ACM A.M. Turing Award recipients John Hennessy and David Patterson delivered the Turing Lecture on June 4 at ISCA 2018]
  
 
== FPGA pielietojumi ==
 
== FPGA pielietojumi ==
 
* [http://www.wired.com/2014/06/microsoft-fpga/ Microsoft Supercharges Bing Search With Programmable Chips]
 
* [http://www.wired.com/2014/06/microsoft-fpga/ Microsoft Supercharges Bing Search With Programmable Chips]

Revision as of 16:20, 3 October 2019

Literatūra


Digital design textbooks @ Digilent Inc.

Saites

Xilinx produkti (FPGA čipi)

Xilinx attīstītajrīki

DiLab ir pieejami sekojoši Xilinx (Digilent) attīstītajrīki:

Xilinx ISE WebPACK (14.7)

Papildus:

Xilinx ISE WebPACK (12.2)

Video applications using FPGA

HDL tutorials

IP cores priekš FPGA


Ieteikumi prezentāciju veidošanā

Piezīmes par plakātu un prezentāciju veidošanu

Atsauksmes par kursu


Citi kursi un saites

Domu graudi

FPGA pielietojumi